TMS320F280033: CMPSS

void dev_cmpss_init(void)
{
    //
    // Disable all the muxes first
    //
    XBAR_enableEPWMMux(XBAR_TRIP4, 0x00);
    //
    // Analog Routing
    //  Set CMPSS1 to compare VBUS voltage signal, A6
    //  Set CMPSS2 to compare V12V voltage signal,  A5
    //  Set CMPSS3 to compare I_DCDC_P current signal,  A3
    //  Set CMPSS4 to compare I_12V current signal, A8
    //
    ASysCtl_selectCMPHPMux(ASYSCTL_CMPHPMUX_SELECT_1, 0x2);  //A6
//    ASysCtl_selectCMPHPMux(ASYSCTL_CMPHPMUX_SELECT_2, 0x5);  //A5
//    ASysCtl_selectCMPHPMux(ASYSCTL_CMPHPMUX_SELECT_3, 0x5);  //A3
    ASysCtl_selectCMPHPMux(ASYSCTL_CMPHPMUX_SELECT_2, 0x4);  //A8

    ASysCtl_selectCMPLPMux(ASYSCTL_CMPLPMUX_SELECT_1, 0x2);
//    ASysCtl_selectCMPLPMux(ASYSCTL_CMPLPMUX_SELECT_2, 0x5);
//    ASysCtl_selectCMPLPMux(ASYSCTL_CMPLPMUX_SELECT_3, 0x5);
    ASysCtl_selectCMPLPMux(ASYSCTL_CMPLPMUX_SELECT_2, 0x4);

    //
    // Set trip limits in CMPSS
    // Link CMPSS events to EPWM modules
    //  Link CMPSS1 to EPWM TZ event
    //  Link CMPSS2 to EPWM TZ event
    //  Link CMPSS3 to EPWM TZ event
    //  Link CMPSS4 to EPWM TZ event
    //
    dev_cmpss_set_trip_limit(VBUS_CMPSS_BASE, VBUS_TRIP_DACVAL);
    XBAR_setEPWMMuxConfig(XBAR_TRIP4, XBAR_EPWM_MUX00_CMPSS1_CTRIPH);
    XBAR_enableEPWMMux(XBAR_TRIP4, XBAR_MUX00);
//
//    dev_cmpss_set_trip_limit(V12V_CMPSS_BASE, V12V_TRIP_DACVAL);
//    XBAR_setEPWMMuxConfig(XBAR_TRIP4, XBAR_EPWM_MUX02_CMPSS2_CTRIPH);
//    XBAR_enableEPWMMux(XBAR_TRIP4, XBAR_MUX02);
//
//    dev_cmpss_set_trip_limit(IDCDCP_CMPSS_BASE, IDCDCP_TRIP_DACVAL);
//    XBAR_setEPWMMuxConfig(XBAR_TRIP4, XBAR_EPWM_MUX04_CMPSS3_CTRIPH);
//    XBAR_enableEPWMMux(XBAR_TRIP4, XBAR_MUX04);
//
//    dev_cmpss_set_trip_limit(I12V_CMPSS_BASE, I12V_TRIP_DACVAL);
//    XBAR_setEPWMMuxConfig(XBAR_TRIP4, XBAR_EPWM_MUX06_CMPSS4_CTRIPH);
//    XBAR_enableEPWMMux(XBAR_TRIP4, XBAR_MUX06);
    dev_cmpss_set_trip_limit(CMPSS2_BASE, I12V_TRIP_DACVAL);
    XBAR_setEPWMMuxConfig(XBAR_TRIP4, XBAR_EPWM_MUX02_CMPSS2_CTRIPH);
    XBAR_enableEPWMMux(XBAR_TRIP4, XBAR_MUX02);
}


static void dev_cmpss_set_trip_limit(uint32_t cmpss_base, int16_t DACval)
{
    //
    //Enable CMPSS1
    //
    CMPSS_enableModule(cmpss_base);

    //
    //Use VDDA as the reference for comparator DACs
    //
    CMPSS_configDAC(cmpss_base,
        CMPSS_DACVAL_SYSCLK | CMPSS_DACREF_VDDA | CMPSS_DACSRC_SHDW);

    //
    //Set DAC to H~90% and L ~10% valuess
    //

//    CMPSS_setDACValueHigh(cmpss_base, 2048+DACval);
//    CMPSS_setDACValueLow(cmpss_base, 2048-DACval);
    CMPSS_setDACValueHigh(cmpss_base, DACval);
    CMPSS_setDACValueLow(cmpss_base, 0);

    //
    //High Comparator output is "not" inverted for high compare event
    //Low Comparator output is inverted for for low compare event
    //
    CMPSS_configHighComparator(cmpss_base, CMPSS_INSRC_DAC );
    CMPSS_configLowComparator(cmpss_base, CMPSS_INSRC_DAC | CMPSS_INV_INVERTED);

    //
    //CMPSS_configFilterHigh(base, samplePrescale,sampleWindow,threshold);
    //Every 10 sysclk sample once, input 33 samples,
    //when >= 23 samples are same, output this value
    //
    CMPSS_configFilterHigh(cmpss_base, 9, 32, 22); //2.75us     sysclk = 120MHz; T = 1/sysclk = 8.3ns,  T_all = 8.3*(9+1)*(32+1) = 2.75us
    CMPSS_configFilterLow(cmpss_base, 9, 32, 22);

    //
    //Reset filter logic & start filtering
    //
    CMPSS_initFilterHigh(cmpss_base);
    CMPSS_initFilterLow(cmpss_base);

    //
    //Configure CTRIPOUT path: Digital filter connect CTRIPOUT3
    //
    CMPSS_configOutputsHigh(cmpss_base, CMPSS_TRIP_FILTER | CMPSS_TRIP_FILTER);
    CMPSS_configOutputsLow(cmpss_base, CMPSS_TRIP_FILTER | CMPSS_TRIP_FILTER);

    //
    //Comparator hysteresis control , set to 2x typical value
    //
    CMPSS_setHysteresis(cmpss_base, 2);

    //
    //Clear the latched comparator events
    //
    CMPSS_clearFilterLatchHigh(cmpss_base);
    CMPSS_clearFilterLatchLow(cmpss_base);

}



   dev_epwm_setup_tz_ost(EPWM1_BASE);


static void dev_epwm_setup_tz_ost(uint32_t epwm_base)
{
    //
    //Trip 4 is the input to the DCAHCOMPSEL. Output eventA1 when DCAH is set.
    //Set DC event source
    //
//    EPWM_selectDigitalCompareTripInput(epwm_base, EPWM_DC_TRIP_TRIPIN4,
    EPWM_selectDigitalCompareTripInput(epwm_base, EPWM_DC_TRIP_TRIPIN4,
                                      EPWM_DC_TYPE_DCAH);
    EPWM_setTripZoneDigitalCompareEventCondition(epwm_base,
                                                EPWM_TZ_DC_OUTPUT_A1,
                                                EPWM_TZ_EVENT_DCXH_HIGH);

    EPWM_setDigitalCompareEventSource(epwm_base, EPWM_DC_MODULE_A,
                                       EPWM_DC_EVENT_1,
                                       EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL);

    EPWM_setDigitalCompareEventSyncMode(epwm_base, EPWM_DC_MODULE_A,
                                       EPWM_DC_EVENT_1,
                                       EPWM_DC_EVENT_INPUT_NOT_SYNCED);

    //
    // Enable the following trips Emulator Stop,TZ1-3 and DCAEVT1
    //
    EPWM_enableTripZoneSignals(epwm_base, EPWM_TZ_SIGNAL_DCAEVT1);

    //
    // What do we want the OST/CBC events to do?
    // TZA events can force EPWMxA
    // TZB events can force EPWMxB
    //
    EPWM_setTripZoneAction(epwm_base, EPWM_TZ_ACTION_EVENT_TZA, EPWM_TZ_ACTION_LOW);
    EPWM_setTripZoneAction(epwm_base, EPWM_TZ_ACTION_EVENT_TZB, EPWM_TZ_ACTION_LOW);

    //
    //Clear any spurious trip and trip flag
    //
    EPWM_clearTripZoneFlag(epwm_base, (EPWM_TZ_INTERRUPT_OST | EPWM_TZ_INTERRUPT_DCAEVT1));
}