我把epwm当成定时器来用，用了epwm2和4，发现epwm4的中断进不去，epwm2的可以。并且很多次是epwm2能进，有时候epwm4也能进。我都找了好几天了，一点结果都没有，求大神帮忙呀。另外， 关于epm2和4的gpio我设置过了，还有那个cmp,shadow之类的占空比寄存器我都设置过了，发现epm4还是进不了中断。
#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
#include "DSP2833x_Examples.h" // DSP2833x Examples Include File
#include "Func_Decl.h"
#include "lcd12864.h"
#define PP GpioDataRegs.GPADAT.bit.GPIO24
#define QQ GpioDataRegs.GPADAT.bit.GPIO25
#define RR GpioDataRegs.GPADAT.bit.GPIO26
#define AA GpioDataRegs.GPBDAT.bit.GPIO36
#define BB GpioDataRegs.GPADAT.bit.GPIO28
#define CC GpioDataRegs.GPBDAT.bit.GPIO38
#define cap_outa GpioDataRegs.GPBDAT.bit.GPIO53
#define cap_outb GpioDataRegs.GPBDAT.bit.GPIO52
#define cap_outc GpioDataRegs.GPBDAT.bit.GPIO51
#define cap_outd GpioDataRegs.GPBDAT.bit.GPIO50
// Configure which ePWM timer interrupts or SOC events are enabled at the PIE level:
// 1 = enabled, 0 = disabled
#define PWM1_INT_ENABLE 1
#define PWM2_INT_ENABLE 1
#define PWM3_INT_ENABLE 1
#define PWM4_INT_ENABLE 1
#define PWM5_INT_ENABLE 1
#define PWM6_INT_ENABLE 1
#define PWM1_INT_DISABLE 0
#define PWM2_INT_DISABLE 0
#define PWM3_INT_DISABLE 0
#define PWM4_INT_DISABLE 0
#define PWM5_INT_DISABLE 0
#define PWM6_INT_DISABLE 0
// Configure the period for each timer
#define PWM1_TIMER_TBPRD 0x100
#define PWM2_TIMER_TBPRD 0x100
#define PWM3_TIMER_TBPRD 0x100
#define PWM4_TIMER_TBPRD 0x119E
#define PWM5_TIMER_TBPRD 0x100
#define PWM6_TIMER_TBPRD 0x100
void main()
{
//MemCopy(&RamfuncsLoadStart, &RamfuncsLoadEnd, &RamfuncsRunStart);
// Initialize System Control:PLL, WatchDog, enable Peripheral Clocks
InitSysCtrl();
// Disable and clear all CPU interrupts:
DINT;
// Initialize Pie Control Registers To Default State:
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
InitPieVectTable();
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.EPWM2_INT = &epwm2_timer_isr;
PieVectTable.EPWM4_INT = &epwm4_timer_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
// Enable PIE interrupts:
PieCtrlRegs.PIEIER3.bit.INTx2 = 1; //epwm2 timer
PieCtrlRegs.PIEIER3.bit.INTx4 = 1; //epwm4 timer
// Enable CPU interrupts:
IER |= M_INT3; //epwm timer
InitGpio();
InitEPwmTimer();
// Enable global Interrupts and higher priority real-time debug events:
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
while(1)
{
;
}
}
//============================================================================================
//epwm2_timer
interrupt void epwm2_timer_isr(void)
{
//EPwm2TimerIntCount++;
cap_outb=!cap_outb;
//BB=!BB;
// Clear INT flag for this timer
EPwm2Regs.ETCLR.bit.INT = 1;
// Acknowledge this interrupt to receive more interrupts from group 3
PieCtrlRegs.PIEACK.all |= PIEACK_GROUP3;
}
//============================================================================================
//epwm4_timer
interrupt void epwm4_timer_isr(void)
{
//EPwm4TimerIntCount++;
cap_outb=!cap_outb;
AA=!AA;
// Clear INT flag for this timer
EPwm4Regs.ETCLR.bit.INT = 1;
// Acknowledge this interrupt to receive more interrupts from group 3
PieCtrlRegs.PIEACK.all |= PIEACK_GROUP3;
}
void InitEPwmTimer()
{
// Module ePWM_timer2
// Setup timer period , phase and counter
EPwm2Regs.TBPRD = PWM2_TIMER_TBPRD; // Set timer period
EPwm2Regs.TBPHS.half.TBPHS = 0x0000; // Phase is 0
EPwm2Regs.TBCTR = 0x0000; // Clear counter
// Setup TBCLK
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
EPwm2Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV4;
EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV4;
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
// Setup ET Registers
EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_PRD; // Enable INT on Period event
EPwm2Regs.ETSEL.bit.INTEN = PWM2_INT_ENABLE; // Enable INT
EPwm2Regs.ETPS.bit.INTPRD = ET_3RD; // Generate INT on 3rd event
// Module ePWM_timer4
// Setup timer period , phase and counter
EPwm4Regs.TBPRD = PWM4_TIMER_TBPRD; // Set timer period
EPwm4Regs.TBPHS.half.TBPHS = 0x0000; // Phase is 0
EPwm4Regs.TBCTR = 0x0000; // Clear counter
// Setup TBCLK
EPwm4Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
EPwm4Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm4Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm4Regs.TBCTL.bit.HSPCLKDIV = TB_DIV4;
EPwm4Regs.TBCTL.bit.CLKDIV = TB_DIV4;
EPwm4Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
// Setup ET Registers
EPwm4Regs.ETSEL.bit.INTSEL = ET_CTR_PRD; // Enable INT on Period event
EPwm4Regs.ETSEL.bit.INTEN = PWM4_INT_ENABLE; // Enable INT
EPwm4Regs.ETPS.bit.INTPRD = ET_3RD; // Generate INT on 3rd event
}
