我使用两个EPWM模块，通过周期中断触发EPWM1，EPWM1和EPWM2设置为主从模块，现在出现问题为EPWM1的A和B工作正常,EPWM2的A和B都输出，配置文件如下，请指教：
extern void InitEPWM(void )
{
//EPWM Module 1 config
// Setup TBCLK
EPwm1Regs.TBPRD = PERIOD; // PWM frequency = 1 / period
EPwm1Regs.CMPA.half.CMPA =PERIOD/2 ;
EPwm1Regs.TBPHS.half.TBPHS = 0x0000; // Set Phase register to zero
EPwm1Regs.TBCTR= 0x0000;
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Asymmetrical mode
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Master module
EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW; // set Immediate load
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // sync "down-stream"
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; //Set the clock rate
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
// Setup shadow register load
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
// Set actions
EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET; // Set PWM1A on Zero
EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR; // Clear PWM1A on event A, up count
// Active high complementary PWMs - Set up the deadband
EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL;
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
EPwm1Regs.DBRED = 30;
EPwm1Regs.DBFED = 30;
//EPWM Module 2 config
// Setup TBCLK
EPwm2Regs.TBPRD = PERIOD; // PWM frequency = 1 / period
EPwm2Regs.CMPA.half.CMPA = PERIOD/2;
EPwm2Regs.TBPHS.half.TBPHS =PERIOD/2; // Set Phase register to zero
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Asymmetrical mode
EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE; // Master module
EPwm2Regs.TBCTL.bit.PRDLD = TB_SHADOW; // set Immediate load
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync "down-stream"
// Setup shadow register load on ZERO
EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
// Set actions
EPwm2Regs.AQCTLA.bit.ZRO = AQ_SET;
EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR;
// Active high complementary PWMs - Set up the deadband
EPwm2Regs.DBCTL.bit.IN_MODE = DBA_ALL;
EPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
EPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
EPwm2Regs.DBRED = 30;
EPwm2Regs.DBFED = 30;
//Event-trigger selction
EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero event
EPwm1Regs.ETSEL.bit.INTEN = PWM1_INT_ENABLE; // Enable INT
EPwm1Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 1st event
}
