我在设置高分辨率周期时,比如说设置429K会得到一个500K到492K之间抖动的波形,这个合理吗?
我使用高精度变频,同时也实现高精度占空比,PWM_A和B都要有输出,SFO函数也使用了。同时EPWM1做主机2做从机。代码配置如下:
EALLOW;
EPwm1Regs.ETSEL.bit.SOCAEN = 1;
EPwm1Regs.ETSEL.bit.SOCASEL = 0x1;//PWM zero triggle
EPwm1Regs.ETPS.bit.SOCAPRD = 0x03;
EPwm1Regs.TBPRD = PWM_PERIOD_700K/2;
EPwm1Regs.TBPHS.half.TBPHS =0;
EPwm1Regs.TBCTL.bit.PHSDIR = 1;
EPwm1Regs.TBCTL.bit.CTRMODE = 2 ;// UP&&DOWN
EPwm1Regs.TBCTL.bit.PHSEN =0;
EPwm1Regs.TBCTL.bit.PRDLD = 0;//OPEN SHADOW REGISTER
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;
EPwm1Regs.TBCTL.bit.CLKDIV = 0;
EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0;
EPwm1Regs.CMPCTL.bit.SHDWAMODE = 0;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = 0;
EPwm1Regs.CMPCTL.bit.LOADAMODE = 0;
EPwm1Regs.CMPCTL.bit.LOADBMODE = 0;
//
EPwm1Regs.AQCTLA.bit.ZRO= 2; //SET
EPwm1Regs.AQCTLA.bit.CAU = 1; //CLEAR
EPwm1Regs.AQCTLB.bit.PRD = 2; //SET
EPwm1Regs.AQCTLB.bit.CBD = 1; //clear
EPwm1Regs.DCTRIPSEL.bit.DCAHCOMPSEL = DC_COMP1OUT;//COMPARE 1OUT
EPwm1Regs.TZDCSEL.bit.DCAEVT2 =TZ_DCAH_HI; //DCAH = high, DCAL = don't care
EPwm1Regs.DCACTL.bit.EVT2SRCSEL = DC_EVT2;
EPwm1Regs.DCACTL.bit.EVT2FRCSYNCSEL = DC_EVT_ASYNC;
EPwm1Regs.TZSEL.bit.DCAEVT2 = 1;
EPwm1Regs.TZCTL.bit.TZA= 2;
EPwm1Regs.TZCTL.bit.TZB= 2;
EPwm1Regs.TZEINT.bit.DCAEVT2 =1;
EPwm1Regs.HRCNFG.bit.HRLOAD =HR_CTR_ZERO; // Shadow load on CTR=Zero
EPwm1Regs.HRCNFG.bit.EDGMODE = HR_BEP; // Control Falling Edge Position
EPwm1Regs.CMPCTL.bit.LOADAMODE = 2;//2;
EPwm1Regs.HRCNFG.bit.HRLOAD =2;
EPwm1Regs.HRPCTL.bit.HRPE = 1;
EDIS;
2的配置和上面相同。就是主从机配置的差异。
确保从属配置不会在每个时间段启用同步。 只需在PWM开始时通过软件执行一次此操作。
同步每个时间段会导致抖动。
EPwm1Regs.HRCNFG.bit.HRLOAD =HR_CTR_ZERO; // Shadow load on CTR=Zero
对于向上计数模式,应在ZRO和Period上加载。
我也没有看到AUTOCONV正在启用。 请确保已启用此功能。