28377D将程序分别下载到cpu1和CPU2的flash后,断电后CPU2里的EPWM7程序未运行,该怎么办?
请各位专家老师帮忙提示一下,这个问题困扰我好多天了,谢谢!
CPU1程序如下:
void main(void)
{
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xD_SysCtrl.c file.
InitSysCtrl();
InitIpc();
#define _STANDALONE 1
#define _FLASH 1
#ifdef _STANDALONE
#ifdef _FLASH
// Send boot command to allow the CPU02 application to begin execution
IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH);
#else
// Send boot command to allow the CPU02 application to begin execution
IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_RAM);
#endif
#endif
{
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xD_SysCtrl.c file.
InitSysCtrl();
InitIpc();
#define _STANDALONE 1
#define _FLASH 1
#ifdef _STANDALONE
#ifdef _FLASH
// Send boot command to allow the CPU02 application to begin execution
IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH);
#else
// Send boot command to allow the CPU02 application to begin execution
IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_RAM);
#endif
#endif
// Step 2. Initialize GPIO:
// This example function is found in the F2837xD_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
InitGpio();
EALLOW;
GpioCtrlRegs.GPEPUD.bit.GPIO157 = 1; // Disable pull-up on GPIO157 (EPWM7A)
GpioCtrlRegs.GPEPUD.bit.GPIO158 = 1; // Disable pull-up on GPIO158 (EPWM7B)
GpioCtrlRegs.GPEMUX2.bit.GPIO157 = 1; // Configure GPIO157 as EPWM7A
GpioCtrlRegs.GPEMUX2.bit.GPIO158 = 1; // Configure GPIO158 as EPWM7B
EDIS;
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// This example function is found in the F2837xD_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
InitGpio();
EALLOW;
GpioCtrlRegs.GPEPUD.bit.GPIO157 = 1; // Disable pull-up on GPIO157 (EPWM7A)
GpioCtrlRegs.GPEPUD.bit.GPIO158 = 1; // Disable pull-up on GPIO158 (EPWM7B)
GpioCtrlRegs.GPEMUX2.bit.GPIO157 = 1; // Configure GPIO157 as EPWM7A
GpioCtrlRegs.GPEMUX2.bit.GPIO158 = 1; // Configure GPIO158 as EPWM7B
EDIS;
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the F2837xD_PieCtrl.c file.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the F2837xD_PieCtrl.c file.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in F2837xD_DefaultIsr.c.
// This function is found in F2837xD_PieVect.c.
InitPieVectTable();
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in F2837xD_DefaultIsr.c.
// This function is found in F2837xD_PieVect.c.
InitPieVectTable();
MemCopy(&RamfuncsLoadStart, &RamfuncsLoadEnd, &RamfuncsRunStart);
InitFlash();
// Enable global Interrupts and higher priority real-time debug events:
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
InitFlash();
// Enable global Interrupts and higher priority real-time debug events:
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
// For this case just init GPIO pins for ePWM1
// Only CPU1 can configure GPIO muxing so this is done here
// These functions are in the F2837xD_EPwm.c file
// Only CPU1 can configure GPIO muxing so this is done here
// These functions are in the F2837xD_EPwm.c file
//Transfer ownership of EPWM1 and ADCA to CPU02
EALLOW;
DevCfgRegs.CPUSEL0.bit.EPWM7 = 1;
EDIS;
// Step 6. IDLE loop. Just sit and loop forever (optional):
while(1)
{
asm(" nop");
}
}
while(1)
{
asm(" nop");
}
}
MemCopy(Uint16 *SourceAddr, Uint16* SourceEndAddr, Uint16* DestAddr)
{
while(SourceAddr < SourceEndAddr)
{
*DestAddr++ = *SourceAddr++;
}
return;
}
{
while(SourceAddr < SourceEndAddr)
{
*DestAddr++ = *SourceAddr++;
}
return;
}
CPU2的程序如下:
void main(void)
{
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xD_SysCtrl.c file.
InitSysCtrl();
InitIpc();
// Step 2. Initialize GPIO:
// This example function is found in the F2837xD_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio(); // Skipped for this example
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
{
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xD_SysCtrl.c file.
InitSysCtrl();
InitIpc();
// Step 2. Initialize GPIO:
// This example function is found in the F2837xD_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio(); // Skipped for this example
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the F2837xD_PieCtrl.c file.
InitPieCtrl();
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the F2837xD_PieCtrl.c file.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in F2837xD_DefaultIsr.c.
// This function is found in F2837xD_PieVect.c.
InitPieVectTable();
MemCopy(&RamfuncsLoadStart, &RamfuncsLoadEnd, &RamfuncsRunStart);
InitFlash();
// Register the EPWM interrupt handler for EPWM1
EALLOW;
PieVectTable.EPWM7_INT = &epwm7_isr;
EDIS;
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in F2837xD_DefaultIsr.c.
// This function is found in F2837xD_PieVect.c.
InitPieVectTable();
MemCopy(&RamfuncsLoadStart, &RamfuncsLoadEnd, &RamfuncsRunStart);
InitFlash();
// Register the EPWM interrupt handler for EPWM1
EALLOW;
PieVectTable.EPWM7_INT = &epwm7_isr;
EDIS;
//Power up the PWM and ADC
EALLOW;
CpuSysRegs.PCLKCR2.bit.EPWM7=1;
EALLOW;
CpuSysRegs.PCLKCR2.bit.EPWM7=1;
//Configure the ADC and power it up
//Setup the ADC for continuous conversions on channel 0
// Configure EPWM1
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =0;
EDIS;
InitEPwm7Example();
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =1;
EDIS;
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =0;
EDIS;
InitEPwm7Example();
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =1;
EDIS;
// Enable CPU INT3 which is connected to EPWM1 INT:
IER |= M_INT3;
IER |= M_INT3;
// Enable EPWM INTn in the PIE: Group 3 interrupt 1
PieCtrlRegs.PIEIER3.bit.INTx7 = 1;
PieCtrlRegs.PIEIER3.bit.INTx7 = 1;
//Enable global Interrupts and higher priority real-time debug events:
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
//Initialize results buffer
for(;;)
{
for(;;)
{
}
}
}
__interrupt void epwm7_isr(void)
{
// Clear INT flag for this timer
EPwm7Regs.ETCLR.bit.INT = 1;
{
// Clear INT flag for this timer
EPwm7Regs.ETCLR.bit.INT = 1;
// Acknowledge this interrupt to receive more interrupts from group 3
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}
void InitEPwm7Example()
{
// Setup TBCLK
EPwm7Regs.TBPRD = 6000; // Set timer period
EPwm7Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm7Regs.TBCTR = 0x0000; // Clear counter
{
// Setup TBCLK
EPwm7Regs.TBPRD = 6000; // Set timer period
EPwm7Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm7Regs.TBCTR = 0x0000; // Clear counter
// Setup TBCLK
EPwm7Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
EPwm7Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm7Regs.TBCTL.bit.HSPCLKDIV = TB_DIV2; // Clock ratio to SYSCLKOUT
EPwm7Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm7Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
EPwm7Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm7Regs.TBCTL.bit.HSPCLKDIV = TB_DIV2; // Clock ratio to SYSCLKOUT
EPwm7Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm7Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Load registers every ZERO
EPwm7Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm7Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm7Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
EPwm7Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm7Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm7Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
// Setup compare
EPwm7Regs.CMPA.bit.CMPA = 3000;
EPwm7Regs.CMPA.bit.CMPA = 3000;
// Set actions
EPwm7Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on Zero
EPwm7Regs.AQCTLA.bit.CAD = AQ_CLEAR;
EPwm7Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on Zero
EPwm7Regs.AQCTLA.bit.CAD = AQ_CLEAR;
EPwm7Regs.AQCTLB.bit.CAU = AQ_NO_ACTION; // Set PWM1A on Zero
EPwm7Regs.AQCTLB.bit.CAD = AQ_NO_ACTION;
EPwm7Regs.AQCTLB.bit.CAD = AQ_NO_ACTION;
// Active Low PWMs - Setup Deadband
EPwm7Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
EPwm7Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
EPwm7Regs.DBCTL.bit.IN_MODE = DBA_ALL;
EPwm7Regs.DBRED = 1000;
EPwm7Regs.DBFED = 1000;
EPwm7Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
EPwm7Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
EPwm7Regs.DBCTL.bit.IN_MODE = DBA_ALL;
EPwm7Regs.DBRED = 1000;
EPwm7Regs.DBFED = 1000;
// Interrupt where we will change the Deadband
EPwm7Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero event
EPwm7Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm7Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 3rd event
EPwm7Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero event
EPwm7Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm7Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 3rd event
}
MemCopy(Uint16 *SourceAddr, Uint16* SourceEndAddr, Uint16* DestAddr)
{
while(SourceAddr < SourceEndAddr)
{
*DestAddr++ = *SourceAddr++;
}
return;
}
{
while(SourceAddr < SourceEndAddr)
{
*DestAddr++ = *SourceAddr++;
}
return;
}