我在flash定义了一块空间，想将数据写入固定flash空间，但是每次都是0xff是否是操作流程有问题，cmd如下：
MEMORY
{
// BOOT_BEGIN : origin = 0x080000, length = 0x000002
CPU1_BEGIN : origin = 0x0A0000, length = 0x000002 // Update the codestart location as needed
CPU2_BEGIN : origin = 0x100000, length = 0x000002
BOOT_RSVD : origin = 0x000002, length = 0x0001AF /* Part of M0, BOOT rom will use this for stack */
RAMM0 : origin = 0x0001B1, length = 0x00024F
RAMM1 : origin = 0x000400, length = 0x000400
RAMD0 : origin = 0x00C000, length = 0x002000
RAMD1 : origin = 0x00E000, length = 0x002000
RAMD2 : origin = 0x01A000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU2, use the address 0x8000. User should comment/uncomment based on core selection
RAMD3 : origin = 0x01C000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU2, use the address 0xA000. User should comment/uncomment based on core selection
RAMD4 : origin = 0x01E000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU2, use the address 0xC000. User should comment/uncomment based on core selection
RAMD5 : origin = 0x020000, length = 0x002000 // Can be mapped to either CPU1 or CPU2. When configured to CPU2, use the address 0xE000. User should comment/uncomment based on core selection
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4 : origin = 0x00A000, length = 0x000800
RAMLS5 : origin = 0x00A800, length = 0x000800
RAMLS6 : origin = 0x00B000, length = 0x000800
RAMLS7 : origin = 0x00B800, length = 0x000800
RAMLS8 : origin = 0x022000, length = 0x002000 // When configured as CLA program use the address 0x4000
RAMLS9 : origin = 0x024000, length = 0x002000 // When configured as CLA program use the address 0x6000
// RAMLS8_CLA : origin = 0x004000, length = 0x002000 // Use only if configured as CLA program memory
// RAMLS9_CLA : origin = 0x006000, length = 0x002000 // Use only if configured as CLA program memory
RAMGS0 : origin = 0x010000, length = 0x002000
RAMGS1 : origin = 0x012000, length = 0x002000
RAMGS2 : origin = 0x014000, length = 0x002000
RAMGS3 : origin = 0x016000, length = 0x002000
RAMGS4 : origin = 0x018000, length = 0x002000
/* Flash Banks (128 sectors each) */
BOOT_FLASH_BANK : origin = 0x080002, length = 0x1DFFE // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection
CPU1_FlASHUpDataFlag : origin = 0x09E000, length = 0x000010
CPU1_FLASH_BANK0 : origin = 0x0A0002, length = 0x1FFFE // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection
CPU1_FLASH_BANK1 : origin = 0x0C0000, length = 0x20000 // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection
CPU1_FLASH_BANK2 : origin = 0x0E0000, length = 0x20000 // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection
CPU2_FLASH_BANK0 : origin = 0x100002, length = 0x1FFFE // Can be mapped to either CPU1 or CPU2. User should comment/uncomment based on core selection
CPU1TOCPU2RAM : origin = 0x03A000, length = 0x000400
CPU2TOCPU1RAM : origin = 0x03B000, length = 0x000400
CLATOCPURAM : origin = 0x001480, length = 0x000080
CPUTOCLARAM : origin = 0x001500, length = 0x000080
CLATODMARAM : origin = 0x001680, length = 0x000080
DMATOCLARAM : origin = 0x001700, length = 0x000080
CANA_MSG_RAM : origin = 0x049000, length = 0x000800
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
RESET : origin = 0x3FFFC0, length = 0x000002
}
SECTIONS
{
FLASH_FLAG : > CPU1_FlASHUpDataFlag PAGE = 0
codestart : > CPU1_BEGIN
.text : >> CPU1_FLASH_BANK0 | CPU1_FLASH_BANK1, ALIGN(8)
.cinit : > CPU1_FLASH_BANK0, ALIGN(8)
.switch : > CPU1_FLASH_BANK0, ALIGN(8)
.reset : > RESET, TYPE = DSECT /* not used, */
.stack : > RAMM1
#if defined(__TI_EABI__)
.bss : > RAMLS5
.bss:output : > RAMLS3
.init_array : > CPU1_FLASH_BANK0, ALIGN(8)
.const : > CPU1_FLASH_BANK0, ALIGN(8)
.data : > RAMLS5
.sysmem : > RAMLS4
#else
.pinit : > CPU1_FLASH_BANK0, ALIGN(8)
.ebss : >> RAMLS5 | RAMLS6
.econst : > CPU1_FLASH_BANK0, ALIGN(8)
.esysmem : > RAMLS5
#endif
ramgs0 : > RAMGS0, type=NOINIT
ramgs1 : > RAMGS1, type=NOINIT
MSGRAM_CPU1_TO_CPU2 > CPU1TOCPU2RAM, type=NOINIT
MSGRAM_CPU2_TO_CPU1 > CPU2TOCPU1RAM, type=NOINIT
CPU1FLASH : > CPU1_FlASHUpDataFlag
#if defined(__TI_EABI__)
.TI.ramfunc : {} LOAD = CPU1_FLASH_BANK0,
RUN = RAMLS4,
LOAD_START(RamfuncsLoadStart),
LOAD_SIZE(RamfuncsLoadSize),
LOAD_END(RamfuncsLoadEnd),
RUN_START(RamfuncsRunStart),
RUN_SIZE(RamfuncsRunSize),
RUN_END(RamfuncsRunEnd),
ALIGN(8)
#else
.TI.ramfunc : {} LOAD = CPU1_FLASH_BANK0,
RUN = RAMLS4,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
ALIGN(8)
#endif
/* CLA specific sections */
#if defined(__TI_EABI__)
/* CLA specific sections */
Cla1Prog : LOAD = CPU1_FLASH_BANK0,
RUN = RAMLS0,
LOAD_START(Cla1ProgLoadStart),
RUN_START(Cla1ProgRunStart),
LOAD_SIZE(Cla1ProgLoadSize),
ALIGN(4)
#else
/* CLA specific sections */
Cla1Prog : LOAD = CPU1_FLASH_BANK0,
RUN = RAMLS0,
LOAD_START(_Cla1ProgLoadStart),
RUN_START(_Cla1ProgRunStart),
LOAD_SIZE(_Cla1ProgLoadSize),
ALIGN(4)
#endif
Cla1ToCpuMsgRAM : > CLATOCPURAM
CpuToCla1MsgRAM : > CPUTOCLARAM
.scratchpad : > RAMLS1
.bss_cla : > RAMLS1
Cla1DataRam : > RAMLS2
cla_shared : > RAMLS1
CLADataLS1 : > RAMLS1
#if defined(__TI_EABI__)
.const_cla : LOAD = CPU1_FLASH_BANK0,
RUN = RAMLS1,
RUN_START(Cla1ConstRunStart),
LOAD_START(Cla1ConstLoadStart),
LOAD_SIZE(Cla1ConstLoadSize),
ALIGN(4)
#else
.const_cla : LOAD = CPU1_FLASH_BANK0,
RUN = RAMLS1,
RUN_START(_Cla1ConstRunStart),
LOAD_START(_Cla1ConstLoadStart),
LOAD_SIZE(_Cla1ConstLoadSize),
ALIGN(4)
#endif
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
写入方式用了两种，一种是用汇编：
asm(" .sect CPU1FLASH ");
asm(" .WORD 5555H ");
asm(" .text ");
另一种如下：
#pragma DATA_SECTION(test_sj,"CPU1FLASH");
const uint16 test_sj[10]={0,1,2,3,4,5,6,7,8,9};
均写入失败，求原因。
