RM48Lx30 芯片的parity error的处理问题。

. If any word fails the parity check, the module generates a parity error signal that is mapped to the Error Signaling Module. The module also captures the peripheral RAM address that caused the parity error.

Table 4-36. Reset/Abort/Error Sources (continued)

http://www.ti.com/lit/ug/spnu503c/spnu503c.pdf 

12.1.2 Block Diagram

Group1 errors have a configurable interrupt response and configurable ERROR pin behavior. Note that the ESM Status Register 1 (ESMSR1) for error group1 gets updated, regardless of whether an ESM interrupt for that Group1 channel is enabled or not.

参考

15.8.4 Fall-Back Address Parity Error Register (FBPARERR)

This register provides a fall-back address to the VIM if a parity error has occurred in the Interrupt Vector Table.

所以流程是这样的

VIM奇偶校验错误->设置了esm group1通道15状态（启用时）->执行vim奇偶校验处理程序。

在E2E上有一些类似的帖子，您也可以参考一下

https://e2e.ti.com/support/microcontrollers/hercules/f/312/t/150950?VIM-RAM-parity-error-detection-doesn-t-generate-ESM-interrupt-but-goes-into-prefetchEntry

https://e2e.ti.com/support/microcontrollers/hercules/f/312/t/804170?tisearch=e2e-sitesearch&keymatch=VIM%2520RAM%2520parity%2520error

Hello Susan,
你所说的这个流程我清楚了，那么我在处理程序中应该怎么处理parity error？TI有没有建议的处理方式？
另外，这个CPU的ECC故障ESM Group 3 channel 7 ： Flash Uncorrectable error 有没有建议的处理方式？
谢谢。