bool commonTimerConfigureTimer(USS_SW_Library_configuration *config)
{
// Configure Timer to be used for delays
uint16_t baseAdress = config->systemConfig->timerBaseAddress;
HARDWAREWREG16(baseAdress + OFS_TAxCTL) =
(TASSEL__ACLK | ID__1 | MC__CONTINUOUS | TACLR);
HARDWAREWREG16(baseAdress + OFS_TAxEX0) =
(TAIDEX_0);
HARDWAREWREG16(baseAdress + OFS_TAxCCTL1) =
CCIE;
// Check the oscillation fault flag if the flag is set then go to LPM3 mode
// for 800 ms if there is fault in LFXT crystal then ACLK is being sourced by
// LFMODCLK at ~37.5 KHz
CSCTL0_H = CSKEY >> 8;
CSCTL5 &= ~LFXTOFFG; // Clear XT1 fault flag
SFRIFG1 &= ~OFIFG;
if(SFRIFG1 & OFIFG)
{
do
{
commonTimerGenerateLowPowerDelay(config,4,
USS_low_power_mode_option_low_power_mode_3);
CSCTL5 &= ~LFXTOFFG; // Clear XT1 fault flag
SFRIFG1 &= ~OFIFG;
}while ((SFRIFG1 & OFIFG));
}
CSCTL0_H = 0;
return true;
}