msp430FG4616的P1.1引脚无法直接输出MCLK,是为什么?
请参考数据表的Table 6-11. Port P1 (P1.0 to P1.5) Pin Functions的CONTROL BITS OR SIGNALS
www.ti.com/.../msp430fg4616.pdf
用户指南Figure 2−9. MSP430x4xx Operating Modes For FLL+ Clock System中MCLK active的动作模式,以及Figure 5−1. MSP430x43x, MSP430x44x, MSP430FG47x, MSP430F47x, and MSP430x461x Frequency-Locked Loop章节