msp430fr6972的mpu操作寄存器数值不发生改变?如何解决??
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
试一下范例程序
//******************************************************************************
// MSP430FR6x7x Demo - MPU Write protection violation - Interrupt notification
//
// Description: The MPU segment boundaries are defined by:
// Border 1 = 0x6000 [MPUSEGB1 = 0x0600]
// Border 2 = 0x8000 [MPUSEGB2 = 0x0800]
// Segment 1 = 0x4400 - 0x5FFF
// Segment 2 = 0x6000 - 0x7FFF
// Segment 3 = 0x8000 - 0x13FFF
// Segment 2 is write protected. Any write to an address in the segment 2 range
// causes a PUC. The LED toggles after accessing SYS NMI ISR.
//
// ACLK = n/a, MCLK = SMCLK = default DCO
//
//
// MSP430FR6972
// ---------------
// /|\| |
// | | |
// --|RST |
// | |
// | P1.0|-->LED
//
// Andreas Dannenberg
// Texas Instruments Inc.
// September 2014
// Built with IAR Embedded Workbench V5.60 & Code Composer Studio V6.0
//******************************************************************************
#include <msp430.h>
unsigned char SYSNMIflag = 0;
unsigned int *ptr = 0;
unsigned int Data = 0;
int main(void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop WDT
// Configure GPIO
P1DIR |= BIT0; // Configure P1.0 for LED
// Disable the GPIO power-on default high-impedance mode to activate
// previously configured port settings
PM5CTL0 &= ~LOCKLPM5;
// Configure MPU
MPUCTL0 = MPUPW; // Write PWD to access MPU registers
MPUSEGB1 = 0x0600; // B1 = 0x6000; B2 = 0x8000
MPUSEGB2 = 0x0800; // Borders are assigned to segments
MPUSAM &= ~MPUSEG2WE; // Segment 2 is protected from write
MPUSAM &= ~MPUSEG2VS; // Violation select on write access
MPUCTL0 = MPUPW | MPUENA | MPUSEGIE; // Enable MPU protection
// MPU registers locked until BOR
Data = 0x88;
// Cause an MPU violation by writing to segment 2+
ptr = (unsigned int *)0x6002;
*ptr = Data;
__delay_cycles(100);
while(SYSNMIflag) // Has violation occured due to Seg2
{
P1OUT ^= BIT0; // Toggle LED
__delay_cycles(100000); // Delay to see toggle
}
// No violation - trap here
while(1);
}
// System NMI vector
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = SYSNMI_VECTOR
__interrupt void SYSNMI_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(SYSNMI_VECTOR))) SYSNMI_ISR (void)
#else
#error Compiler not supported!
#endif
{
switch (__even_in_range(SYSSNIV, SYSSNIV_CBDIFG))
{
case SYSSNIV_NONE: break;
case SYSSNIV_RES02: break;
case SYSSNIV_UBDIFG: break;
case SYSSNIV_RES06: break;
case SYSSNIV_MPUSEGPIFG: break;
case SYSSNIV_MPUSEGIIFG: break;
case SYSSNIV_MPUSEG1IFG: break;
case SYSSNIV_MPUSEG2IFG:
MPUCTL1 &= ~MPUSEG2IFG; // Clear violation interrupt flag
SYSNMIflag = 1; // Set flag
break;
case SYSSNIV_MPUSEG3IFG: break;
case SYSSNIV_VMAIFG: break;
case SYSSNIV_JMBINIFG: break;
case SYSSNIV_JMBOUTIFG: break;
case SYSSNIV_CBDIFG: break;
default: break;
}
}