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The full-scale range (FSR) is defined by VFS+ = +VREF/GAIN and VFS-= -VREF/GAIN: FSR = VFS+ - VFS-= 2*VREF/GAIN. If VREF is sourced
externally, the analog input range should not exceed 80% of VFS+ or VFS-; i.e., VID = 0.8 VFS- to 0.8 VFS+. If VREF is sourced internally,
the given VID ranges apply.
SD是积分型采用,原理不一样,可以先了解一下积分型ADC原理。
yb430 说:谢谢,我知道了。
另外再追问一个问题:输入范围为何是 Vref/2 *80%,而不是Vref / 2 ?
比如内部参考电压是1.2V,如果输入580mV的电压,无法测量吗?
这个得确认一下,下周回你。