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freemodbus移植失败希望帮助移植



移植已经有一定程度用f149可以成功编译,但是F249 F2619 G2553是不成功的。卡在寄存器上,protserial.c这文件要重新修改。但是这里我对寄存器不熟悉可否帮忙修改这个文件尼~!谢谢iar编辑器

  • 自己顶起第二弹

    希望工作人员帮我看看 G2553下的portserial.c,如果有错请指出

    /*
     * FreeModbus Libary: MSP430 Port
     * Copyright (C) 2006 Christian Walter <wolti@sil.at>
     *
     * This library is free software; you can redistribute it and/or
     * modify it under the terms of the GNU Lesser General Public
     * License as published by the Free Software Foundation; either
     * version 2.1 of the License, or (at your option) any later version.
     *
     * This library is distributed in the hope that it will be useful,
     * but WITHOUT ANY WARRANTY; without even the implied warranty of
     * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     * Lesser General Public License for more details.
     *
     * You should have received a copy of the GNU Lesser General Public
     * License along with this library; if not, write to the Free Software
     * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
     *
     * File: $Id: portserial.c,v 1.3 2006/11/19 03:57:49 wolti Exp $
     */
    
    /* ----------------------- Platform includes --------------------------------*/
    #include "port.h"
    
    /* ----------------------- Modbus includes ----------------------------------*/
    #include "mb.h"
    #include "mbport.h"
    
    /* ----------------------- Defines ------------------------------------------*/
    #define U0_CHAR                 ( 0x10 )        /* Data 0:7-bits / 1:8-bits */
    
    #define DEBUG_PERFORMANCE       ( 1 )
    
    #if DEBUG_PERFORMANCE == 1
    #define DEBUG_PIN_RX            ( 0 )
    #define DEBUG_PIN_TX            ( 1 )
    #define DEBUG_PORT_DIR          ( P1DIR )
    #define DEBUG_PORT_OUT          ( P1OUT )
    #define DEBUG_INIT( )           \
      do \
      { \
        DEBUG_PORT_DIR |= ( 1 << DEBUG_PIN_RX ) | ( 1 << DEBUG_PIN_TX ); \
        DEBUG_PORT_OUT &= ~( ( 1 << DEBUG_PIN_RX ) | ( 1 << DEBUG_PIN_TX ) ); \
      } while( 0 ); 
    #define DEBUG_TOGGLE_RX( ) DEBUG_PORT_OUT ^= ( 1 << DEBUG_PIN_RX )
    #define DEBUG_TOGGLE_TX( ) DEBUG_PORT_OUT ^= ( 1 << DEBUG_PIN_TX )
    
    #else
    
    #define DEBUG_INIT( )
    #define DEBUG_TOGGLE_RX( )
    #define DEBUG_TOGGLE_TX( )
    #endif
    
    /* ----------------------- Static variables ---------------------------------*/
    UCHAR           ucGIEWasEnabled = FALSE;
    UCHAR           ucCriticalNesting = 0x00;
    
    /* ----------------------- Start implementation -----------------------------*/
    void
    vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable )
    {
        ENTER_CRITICAL_SECTION(  );
        if( xRxEnable )
        {
            //IE1 |= URXIE0;
    		IE2 |= UCA0RXIE;
        }
        else
        {
            //IE1 &= ~URXIE0;
    		IE2 &= ~UCA0RXIE;
        }
        if( xTxEnable )
        {
           // IE1 |= UTXIE0;
           // IFG1 |= UTXIFG0;
    	   IE2 |= UCA0TXIE;
    	   IFG1 |= UCA0TXIFG;
        }
        else
        {
            //IE1 &= ~UTXIE0;
    		IE2 &= UCA0TXIE;
        }
        EXIT_CRITICAL_SECTION(  );
    }
    
    BOOL
    xMBPortSerialInit( UCHAR ucPort, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity )
    {
        BOOL            bInitialized = TRUE;
        USHORT          UxCTL = 0;
        //USHORT          UxBR = ( USHORT ) ( SMCLK / ulBaudRate );
         UCA0BR0 = ( SMCLK / ulBaudRate );        // 1MHz 19200
         //UCA0BR1 = ( SMCLK % ulBaudRate ); 
        switch ( eParity )
        {
        case MB_PAR_NONE:
            break;
        case MB_PAR_ODD:
            //UxCTL |= PENA;
    		UCA0CTL1 |= UCPEN;
            break;
        case MB_PAR_EVEN:
           // UxCTL |= PENA | PEV;
    	   UCA0CTL1 |= UCPEN | UCPAR ;
            break;
        }
        switch ( ucDataBits )
        {
        case 8:
            //UxCTL |= U0_CHAR;
    		UCA0CTL1 &=~UC7BIT;
            break;
        case 7:
            break;
        default:
            bInitialized = FALSE;
        }
        if( bInitialized )
        {
            ENTER_CRITICAL_SECTION(  );
            /* Reset USART */
            //U0CTL |= SWRST;
    		UCA0CTL1 &= ~UCSWRST;
            /* Initialize all UART registers */
           // U0CTL = UxCTL | SWRST;
    		UCA0CTL1 |= UCSWRST;
            /* SSELx = 11 = SMCLK. Use only if PLL is synchronized ! */
            //U0TCTL = SSEL1 | SSEL0;
            //U0RCTL = URXEIE;
    		UCA0CTL1 |= UCSSEL_2; 
            /* Configure USART0 Baudrate Registers. */
            U0BR0 = ( UxBR & 0xFF );
            U0BR1 = ( UxBR >> 8 );
            U0MCTL = 0;
            /* Enable UART */
           // ME1 |= UTXE0 | URXE0;
    	   IE2 |= UCA0RXIE+UCA0TXIE;
    	   UCA0MCTL = UCBRS0; 
            /* Clear reset flag. */
            //U0CTL &= ~SWRST;
            UCA0CTL1 &= ~UCSWRST;  
            /* USART0 TXD/RXD */
            P3SEL |= 0x30;
            P3DIR |= 0x10;
             
            EXIT_CRITICAL_SECTION(  );
    
            DEBUG_INIT( );
        }
        return bInitialized;
    }
    
    BOOL
    xMBPortSerialPutByte( CHAR ucByte )
    {
        TXBUF0 = ucByte;
        return TRUE;
    }
    
    BOOL
    xMBPortSerialGetByte( CHAR * pucByte )
    {
        *pucByte = RXBUF0;
        return TRUE;
    }
    
    //#if defined (__GNUC__)
    //interrupt (USART0RX_VECTOR) prvvMBSerialRXIRQHandler( void )
    //#else
    #pragma vector =USART0RX_VECTOR
    __interrupt
    void
    prvvMBSerialRXIRQHandler( void ) //__interrupt[USART0RX_VECTOR]
    //#endif
    {
        DEBUG_TOGGLE_RX( );
        pxMBFrameCBByteReceived(  );
    }
    
    //#if defined (__GNUC__)
    //interrupt (USART0TX_VECTOR) prvvMBSerialTXIRQHandler( void )
    //#else
    #pragma vector =USART0TX_VECTOR
    __interrupt
    void
    prvvMBSerialTXIRQHandler( void ) __interrupt[USART0TX_VECTOR]
    //#endif
    {
        DEBUG_TOGGLE_TX( );
        pxMBFrameCBTransmitterEmpty(  );
    }
    
    void
    EnterCriticalSection( void )
    {
        USHORT usOldSR;
        if( ucCriticalNesting == 0 )
        {
    #if defined (__GNUC__)
            usOldSR = READ_SR;
            _DINT( );
    #else
          //  usOldSR = _DINT( );
    #endif
          //  ucGIEWasEnabled = usOldSR & GIE ? TRUE : FALSE;
    	  _DINT();
    	  ucGIEWasEnabled=TRUE;
        }
        ucCriticalNesting++;
    }
    
    void
    ExitCriticalSection( void )
    {
        ucCriticalNesting--;
        if( ucCriticalNesting == 0 )
        {
            if( ucGIEWasEnabled )
            {
    			ucGIEWasEnabled=FALSE;
                _EINT();
            }
        }
    }
    


  • UART寄存器的配置参考历程就可以,但是要说帮你看你的porting文件,这个就没办法看了

  • 我怕细节上的东西有问题~!所以如果有问题烦指出!谢谢