If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
For proper operation, the internal voltage reference generator must be supplied with storage capacitance across VREF+ and AVSS. The recommended storage capacitance is a parallel combination of 10-µF and 0.1-µF capacitors. From turn-on, a maximum of 17 ms must be allowed for the voltage reference generator to bias the recommended storage capacitors. If the internal reference generator is not used for the
conversion, the storage capacitors are not required.
如 Figure 23-11. ADC12 Grounding and Noise Considerations 所示
