MSP430f5172的序列通道采样问题

Jeff Wong96

各位好：

我想用到5172的序列通道，我配置了三通道（A5,A4和A3）是好的，采集数据是正确的，但是修改参数改为四通道想用到A6就不行了，不知道什么原因，请各位帮忙看看，具体是什么错误。我把我的代码配置贴出来给大家看看，其中AD_Deel()函数8ms执行一次

void  AD_configure（）
{
  P1SEL|=BIT5;  // BIT3+BIT4+         // 
  P3SEL |=BIT7;       //添加通道6
  // Configure ADC10; pulse sample mode, s/w trigger, rpt seq of channels
  ADC10CTL0 = ADC10SHT_6 + ADC10MSC + ADC10ON;  // ADCclks, ADC on
  ADC10CTL1 = ADC10SHP + ADC10CONSEQ_3;              // Sampling timer, rpt seq of ch
  ADC10CTL2 = ADC10RES;                                                 // 10-bit resolution
  //  ADC10MCTL0 = ADC10INCH_5;                                     // 原先从通道5开始递减
   ADC10MCTL0 = ADC10INCH_6;                                        // 从通道6开始递减
  DMACTL0 = DMA0TSEL_24;                                               // ADC10IFG trigger
   __data16_write_addr((unsigned short) &DMA0SA,(unsigned long) &ADC10MEM0); // Source single address 
  DMA0SZ = 0x08;                                                                 //原来设置成6，现在改为8
  DMA0CTL = DMADT_4 + DMADSTINCR_3 + DMAEN + DMAIE;
          }



 void ADC_Deel()
  {
    unsigned int i; 
    for(i=0;i<4;i++)                                            //原来的i<3改成i<4
    {   
        __data16_write_addr((unsigned short) &DMA0DA,(unsigned long) &ADC_Result[i]);
          
           ADC_Result[i]      = (ADC_Result[i]   <<6)&0xffC0;
           ADC_Result[i+1]    = (ADC_Result[i+1] <<6)&0xffC0;
           ADC_Result[i+2]    = (ADC_Result[i+2] <<6)&0xffC0;// 
           ADC_Result[i+3]    = (ADC_Result[i+3] <<6)&0xffC0;  //添加通道6后添加的   
 
           while (ADC10CTL1 & BUSY);                   // Wait if ADC10 core is active
           ADC10CTL0 |= ADC10ENC + ADC10SC; // Sampling and conversion ready
          __bis_SR_register(CPUOFF + GIE);          // LPM0, ADC10_ISR will force exit
}
__delay_cycles(50);                                                // Delay between sequence convs 
__no_operation();                                               // BREAKPOINT; check ADC_Result

}

7 年多前

0 灰小子 7 年多前

Guru 67475 points

你的io配置有问题。建议参考下序列采样例程

//******************************************************************************
//  MSP430F51x2 Demo - ADC10, DMA Sample A2-0, 8-bit Res, Single Sequence, DCO
//
//  Description: Sample A2/A1/A0 as single sequence with reference to AVcc.
//  Software sets ADC10SC to trigger sample sequence. In Mainloop MSP430 waits
//  in LPM0 to save power until ADC10 conversion complete, DMA_ISR will
//  force exit from any LPMx. ADC10 internal oscillator times sample period 
//  (16x) and conversion (13x). DMA transfers conv results ADC_Result variable. 
//
//               MSP430F51x2
//            -----------------
//        /|\|              XIN|-
//         | |                 |
//         --|RST          XOUT|-
//           |                 |
//       >---|P1.2/A2          |
//       >---|P1.1/A1          |
//       >---|P1.0/A0          |
//
//  F. Chen
//  Texas Instruments Inc.
//  Nov. 2012
//  Built with CCS v5.2.1 and IAR Embedded Workbench Version: 5.51.1
//******************************************************************************
#include <msp430.h>

unsigned char ADC_Result[3];                // 8-bit ADC conversion result array

int main(void)
{
  WDTCTL = WDTPW + WDTHOLD;                 // Stop WDT
  
  PMAPPWD = 0x02D52;      // Enable Write-access to modify port mapping registers
  PMAPCTL = PMAPRECFG;    // Allow reconfiguration during runtime
  P1MAP0|= PM_ANALOG;    // Modify all PxMAPy registers
  P1MAP1|= PM_ANALOG;    // Modify all PxMAPy registers
  P1MAP2|= PM_ANALOG;    // Modify all PxMAPy registers
  PMAPPWD = 0;            // Disable Write-Access to modify port mapping registers by writing incorrect key
  P1SEL|=BIT0+BIT1+BIT2;   // setting the port mapping register PxMAPy to PM_ANALOG together with PxSEL.y=1 when applying analog signals
  

  // Configure ADC10
  ADC10CTL0 = ADC10SHT_2 + ADC10MSC + ADC10ON;// 16ADCclks, MSC, ADC ON
  ADC10CTL1 = ADC10SHP + ADC10CONSEQ_1;     // sampling timer, s/w trig.,single sequence
  ADC10CTL2 &= ~ADC10RES;                   // 8-bit resolution
  ADC10MCTL0 = ADC10INCH_2;                 // A0,A1,A2(EoS), AVCC
  
  // Configure DMA0 (ADC10IFG trigger)
  DMACTL0 = DMA0TSEL_24;                    // ADC10IFG trigger
  __data16_write_addr((unsigned short) &DMA0SA,(unsigned long) &ADC10MEM0);
                                            // Source single address  
  __data16_write_addr((unsigned short) &DMA0DA,(unsigned long) &ADC_Result[0]);
                                            // Destination array address  
  DMA0SZ = 0x03;                            // 3 conversions 
  DMA0CTL = DMADT_4 + DMADSTINCR_3 + DMASRCBYTE + DMADSTBYTE + DMAEN + DMAIE; 
                                            // Rpt, inc dest, byte access, 
                                            // enable int after seq of convs   
  while(1)
  {
    while (ADC10CTL1 & BUSY);               // Wait if ADC10 core is active
    ADC10CTL0 |= ADC10ENC + ADC10SC;        // Sampling and conversion start
    __bis_SR_register(CPUOFF + GIE);        // LPM0, ADC10_ISR will force exit
    __delay_cycles(5000);                   // Delay between sequence convs    
    __no_operation();                       // BREAKPOINT; check ADC_Result
  }
}

#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=DMA_VECTOR
__interrupt void DMA0_ISR (void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(DMA_VECTOR))) DMA0_ISR (void)
#else
#error Compiler not supported!
#endif
{
  switch(__even_in_range(DMAIV,16))
  {
    case  0: break;                          // No interrupt
    case  2: 
      // sequence of conversions complete
      __bic_SR_register_on_exit(CPUOFF);     // exit LPM
      break;                                 // DMA0IFG
    case  4: break;                          // DMA1IFG
    case  6: break;                          // DMA2IFG
    case  8: break;                          // Reserved
    case 10: break;                          // Reserved
    case 12: break;                          // Reserved
    case 14: break;                          // Reserved
    case 16: break;                          // Reserved
    default: break; 
  }   
}

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MSP430f5172的序列通道采样问题