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MSP430G2553的UART模块,无法使用ACLK作为时钟

辅助时钟ACLK使用VLO晶振;

UART配置为ACLK的主时钟;

但是用串口助手调试,发现并不会进入UART接收中断。

难道ACLK没有工作,还是配置错误?

另外,我使用SMCLK作为UART主时钟时,正常工作。

附上串口初始化配置程序和基本时钟系统配置程序:

void UART_initial(void)//UART模块配置
{
P1SEL = BIT1 + BIT2;//P1.1&P1.2 SECOND FUNCTION
P1SEL2 = BIT1 + BIT2;
P1DIR = BIT2 + BIT4;//P1.2 P1.4 OUTPUT ,P1.1 RX
UCA0CTL1 |= UCSWRST;// UART RESET
UCA0CTL1 |= UCSSEL_1;// ACLK 12kHz VL Oscillator
UCA0BR0 = 1;//104
UCA0BR1 = 0;
UCA0MCTL = UCBRS0+UCBRS1;//generate 9600BPS
UCA0CTL1 &= ~UCSWRST;// OPERATION
IE2 |= UCA0RXIE;//OPEN RX interrupt
}

void Clk_initial(void)
{
if(CALBC1_1MHZ==0xFF || CALDCO_1MHZ==0xFF)
    {
     while(1);
    }
DCOCTL = 0; // Select lowest DCOx and MODx settings
BCSCTL1 = CALBC1_1MHZ; // Set RSEL2=0X04:RSEL4 + XT20FF=0X80
DCOCTL = CALDCO_1MHZ; //Set DCO1=0x40:DCO2
BCSCTL2 = SELM0; //SELM0=0x40 1MHz DCO FOR MCLK&SMCLK internal Resistor
BCSCTL3|=LFXT1S_2;//guidesheet上面没写BCSCTL3,这里选择ACLK的时钟源为内部VLO
}

烦劳各位了!

  • 官网有使用aclk做时钟的uart例程,你参考下
    www.ti.com/.../slac485
  • 您可以在TI Resource Explorer 找到对应的例程,请您先试一下

    /* --COPYRIGHT--,BSD_EX
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     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     *
     *******************************************************************************
     * 
     *                       MSP430 CODE EXAMPLE DISCLAIMER
     *
     * MSP430 code examples are self-contained low-level programs that typically
     * demonstrate a single peripheral function or device feature in a highly
     * concise manner. For this the code may rely on the device's power-on default
     * register values and settings such as the clock configuration and care must
     * be taken when combining code from several examples to avoid potential side
     * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
     * for an API functional library-approach to peripheral configuration.
     *
     * --/COPYRIGHT--*/
    //******************************************************************************
    //   MSP430G2xx3 Demo - USCI_A0, Ultra-Low Pwr UART 9600 Echo ISR, 32kHz ACLK
    //
    //   Description: Echo a received character, RX ISR used. Normal mode is LPM3,
    //   USCI_A0 RX interrupt triggers TX Echo.
    //   ACLK = BRCLK = LFXT1 = 32768Hz, MCLK = SMCLK = DCO ~1.2MHz
    //   Baud rate divider with 32768Hz XTAL @9600 = 32768Hz/9600 = 3.41
    //* An external watch crystal is required on XIN XOUT for ACLK *//
    //
    //                MSP430G2xx3
    //             -----------------
    //         /|\|              XIN|-
    //          | |                 | 32kHz
    //          --|RST          XOUT|-
    //            |                 |
    //            |     P1.2/UCA0TXD|------------>
    //            |                 | 9600 - 8N1
    //            |     P1.1/UCA0RXD|<------------
    //
    //   D. Dang
    //   Texas Instruments Inc.
    //   February 2011
    //   Built with CCS Version 4.2.0 and IAR Embedded Workbench Version: 5.10
    //******************************************************************************
    #include <msp430.h>
    
    int main(void)
    {
      WDTCTL = WDTPW + WDTHOLD;                 // Stop WDT
      P1DIR = 0xFF;                             // All P1.x outputs
      P1OUT = 0;                                // All P1.x reset
      P2DIR = 0xFF;                             // All P2.x outputs
      P2OUT = 0;                                // All P2.x reset
      P1SEL = BIT1 + BIT2 ;                     // P1.1 = RXD, P1.2=TXD
      P1SEL2= BIT1 + BIT2 ;                     // P1.1 = RXD, P1.2=TXD
      P3DIR = 0xFF;                             // All P3.x outputs
      P3OUT = 0;                                // All P3.x reset  
      UCA0CTL1 |= UCSSEL_1;                     // CLK = ACLK
      UCA0BR0 = 0x03;                           // 32kHz/9600 = 3.41
      UCA0BR1 = 0x00;                           //
      UCA0MCTL = UCBRS1 + UCBRS0;               // Modulation UCBRSx = 3
      UCA0CTL1 &= ~UCSWRST;                     // **Initialize USCI state machine**
      IE2 |= UCA0RXIE;                          // Enable USCI_A0 RX interrupt
    
      __bis_SR_register(LPM3_bits + GIE);       // Enter LPM3, interrupts enabled
    }
    
    // Echo back RXed character, confirm TX buffer is ready first
    #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
    #pragma vector=USCIAB0RX_VECTOR
    __interrupt void USCI0RX_ISR(void)
    #elif defined(__GNUC__)
    void __attribute__ ((interrupt(USCIAB0RX_VECTOR))) USCI0RX_ISR (void)
    #else
    #error Compiler not supported!
    #endif
    {
      while (!(IFG2&UCA0TXIFG));                 // USCI_A0 TX buffer ready?
      UCA0TXBUF = UCA0RXBUF;                     // TX -> RXed character
    }
    

    http://dev.ti.com/tirex/#/?link=Software%2FMSP430Ware%2FDevices%2FMSP430G2XX%2FMSP430G2553%2FPeripheral%20Examples%2FRegister%20Level%2Fmsp430g2xx3_uscia0_uart_05_9600.c

  • 蟹蟹。但是ACLK我用的是MSP430的内部时钟VLO,没有外接32k晶振。

    于是,串口并工作不起来。- -|||

  • 那您需要修改下时钟配置了,ACLK的信号源是可以为VLOCLK的
  • void Clk_initial(void)
    {

    if(CALBC1_1MHZ==0xFF || CALDCO_1MHZ==0xFF)
    {
    while(1);
    }
    DCOCTL = 0; // Select lowest DCOx and MODx settings
    BCSCTL1 = CALBC1_1MHZ; // Set RSEL2=0X04:RSEL4 + XT20FF=0X80
    DCOCTL = CALDCO_1MHZ; //Set DCO1=0x40:DCO2
    BCSCTL2 = SELM0; //SELM0=0x40 1MHz DCO FOR MCLK&SMCLK internal Resistor
    BCSCTL3|=LFXT1S_2;//这里选择ACLK的时钟源为内部VLO
    }

    这是我的时钟配置程序,1MHz的DCO分给MCLK&SMCLK;12kHz的VLO分给ACLK。
    uart选择SMCLK时钟时,是可以正常工作的,但改为ACLK就不行了(比特率也做了相应修改)。
    我仔细读了Guidesheet也找不到原因,也不知道如何检查ACLK时钟是否工作,还望指点啊,蟹蟹。
  • VLO的误差会比较大,我们一般不用它作为UART通信的时钟源

  • 谢谢。原来如此,UART下省电就省得少了,那我去把波特率调高吧。