请问MSP432的各个GPIO口的时钟是默认开启的还是需要使能的？我在MSP432P401R的TRM中没有找到相关的外设时钟使能寄存器，请教TI工程师。

在 http://www.ti.com.cn/cn/lit/ug/slau356i/slau356i.pdf 内有相关的说明，（Figure 6-2. Module Clock Request System）如下

A peripheral module may request any system clock (for example, ACLK, HSMCLK, or SMCLK). A request is based on the clock selection and enable of the respective module. For example, if a timer selects ACLK as its clock source and the timer is enabled, the timer generates an ACLK request signal to the clock system. The clock system, in turn, enables ACLK to the module.

The system clocks are each distributed to the peripheral modules as individual clock lines as shown in Figure 6-2. This reduces dynamic power to modules that do not require a particular system clock. Only peripheral clocks that request the respective system clock receive it.

MSP432的串口，定时器等外设的确可以选择时钟，但是GPIO口貌似上电后时钟就默认开启，这样会不会影响系统功耗啊，我也是刚上手MSP432。

请参考

http://dev.ti.com/tirex/content/simplelink_msp432_sdk_1_30_00_40/docs/driverlib/msp432p4xx/html/driverlib_html/group__cs__api.html#ga04bee12e0506189b27fae7e0ec225add

Enables conditional module requests

Parameters

selectClock

selects specific request enables. Valid values are are a logical OR of the following values: CS_ACLK, CS_HSMCLK, CS_SMCLK, CS_MCLK

Returns

NONE

void CS_enableClockRequest(uint32_t selectClock)
{
    ASSERT(
            selectClock == CS_ACLK || selectClock == CS_HSMCLK
            || selectClock == CS_SMCLK || selectClock == CS_MCLK);

    /* Unlocking the module */
    CS->KEY = CS_KEY;

    CS->CLKEN |= selectClock;

    /* Locking the module */
    BITBAND_PERI(CS->KEY, CS_KEY_KEY_OFS) = 1;
}

外设可以单独开启或关闭时钟的