MSP430FR2155 TimerB generates PWM and an exception occurs

Timer B generates PWM. When the duty cycle increases, the PWM is normal; however, when the duty cycle decreases, a full cycle high level appears. E.g,
If TB1CCR1 = 100, change to TB1CCR1 = 200, and the duty cycle changes from 25% to 50%, which is normal; but, if TB1CCR1 = 200, change to TB1CCR1 = 100, and the duty cycle first changes from 50% to 100%, then To 25%.

void pwm_init(void)
{
    PM5CTL0 &= ~LOCKLPM5;

    TB1CCR0 = 400-1; // PWM Period
    TB1CCTL1 = OUTMOD_7;// | CCIE; // CCR1 reset/set
    TB1CTL = TBSSEL__SMCLK | MC__UP | TBCLR; // | TBIE; // SMCLK, up mode, clear TBR

    _delay_cycles (200);
    TB3CCR0 = 400-1; // PWM Period
    TB3CCTL5 = OUTMOD_7;// | CCIE; // CCR1 reset/set
    TB3CTL = TBSSEL__SMCLK | MC__UP | TBCLR; // SMCLK, up mode, clear TB

}