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//******************************************************************************
// MSP430FR2522 MSP430FR2422 Memory Protection Offset Configuration Example
//
// Description: Configure FRWPOAx bits in SYSCFG0 register to unprotect
// n*1KB(n = 1,2,...7) program FRAM. The rest of program FRAM is
// protected by PFWP bit in SYSCFG0 register.
// In this example, n = 1; Unprotect FRAM from 0xE300 to 0xE6FF
//
// Step by Step configuration in CCS:
// 1. Replace ¡°FRAM: origin = 0xE300, length = 0x1C80¡± with
// ¡°FRAM: origin = 0xE700, length = 0x1880¡± in
// lnk_msp430fr2x22.cmd file
// 2. Configure SYSCFG0 register in user code
// ¡°SYSCFG0 = FRWPPW + FRWPOA0 + DFWP + PFWP;¡±
//
// Step by Step configuration in IAR:
// 1. Replace all ¡°0xE300¡± with ¡°0xE700¡± in lnk430fr2x22.xcl file
// 2. Configure SYSCFG0 register in user code
// ¡°SYSCFG0 = FRWPPW + FRWPOA0 + DFWP + PFWP;¡±
//
// Ling Zhu
// Texas Instruments Inc.
// July 2017
// Built with Code Composer Studio v7.2.0
//******************************************************************************
