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如果用USCI_A0作为SPI就可以跟NRF24L01通信,换成USCI_B0就不行,why???
//这是对NRF24L01写读
uchar SPI_RW(uchar byte)
{
while(!(IFG2 & UCB0TXIFG));
UCB0TXBUF=byte;
//Delay_us(20);
while(!(IFG2 & UCB0RXIFG));
return(UCB0RXBUF);
}
// uart 和spi 初始化
void UART_init(void)
{
DCOCTL = 0x00;
BCSCTL1 = CALBC1_1MHZ;
DCOCTL = CALDCO_1MHZ;
UCA0CTL1 |= UCSWRST;
UCB0CTL1 |= UCSWRST;
P1SEL = BIT1 + BIT2 ;
P1SEL2 = BIT1 + BIT2 ;
UCA0CTL1 |= UCSSEL_2;
UCA0BR0 = 104;
UCA0BR1 = 0;
UCA0MCTL = 0;
UCB0CTL0 |= UCCKPH+ UCMSB + UCMST + UCSYNC ; // 3-pin, 8-bit SPI master
UCB0CTL1 |= UCSSEL_2; // SMCLK
UCB0BR0 |= 0x08; // /2
UCB0BR1 = 0;
UCA0CTL1 &= ~UCSWRST;
UCB0CTL1 &= ~UCSWRST;
}
void SPI_Init(void)
{
UCB0CTL0 = UCMSB + UCMST + UCMODE_1 + UCSYNC; // MSB First; Set TBA as master; 4Pin Mode, slave active on UCB1STE=>NCS low; SPI Mode
UCB0CTL1 = UCSWRST + UCSSEL_2; // Reset and hold reset logic state; SMCLK as USC clock source
UCB0BR0 = 0x50; // Set Baud Rate divider (MSByte) for SPI clock
UCB0BR1 = 0; // Set Baud Rate divider (LSByte) for SPI clock
P1SEL |= BIT5 + BIT6 + BIT7; // Configure P1.5, P1.6, & P1.7 as SPICLK, SOMI, and SIMO to talk to BAST
P1SEL2|= BIT5 + BIT6 + BIT7;
P1DIR |= BIT5 + BIT6 + BIT7; // SPICLK, SOMI, and SIMO as outputs
P1DIR &= ~BIT6; // SOMI as input
P1DIR &= ~BIT3; // INT as input
UCB0CTL1 &= ~UCSWRST; // Leave logic reset state. Starts SPI state machine
}
void UART_Init(void)
{
P1SEL = BIT1 + BIT2 ; // P1.1 = RXD, P1.2=TXD
P1SEL2 = BIT1 + BIT2 ;
UCA0CTL1 |= UCSSEL_2; // SMCLK
UCA0BR0 = 0x41; // 8MHz 9600 Baud Rate
UCA0BR1 = 0x03; // 8MHz 9600 Baud Rate
UCA0MCTL = UCBRS0; // Modulation UCBRSx = 1
UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
IE2 |= UCA0RXIE; // Enable USCI_A0 RX interrupt
}
两个配置,实际应用的代码,做参考。
void SPI_Init(void)
{
UCB0CTL0 = UCMSB + UCMST + UCMODE_1 + UCSYNC; // MSB First; Set TBA as master; 4Pin Mode, slave active on UCB1STE=>NCS low; SPI Mode
UCB0CTL1 = UCSWRST + UCSSEL_2; // Reset and hold reset logic state; SMCLK as USC clock source
UCB0BR0 = 0x50; // Set Baud Rate divider (MSByte) for SPI clock
UCB0BR1 = 0; // Set Baud Rate divider (LSByte) for SPI clock
P1SEL |= BIT5 + BIT6 + BIT7; // Configure P1.5, P1.6, & P1.7 as SPICLK, SOMI, and SIMO to talk to BAST
P1SEL2|= BIT5 + BIT6 + BIT7;
P1DIR |= BIT5 + BIT6 + BIT7; // SPICLK, SOMI, and SIMO as outputs
P1DIR &= ~BIT6; // SOMI as input
P1DIR &= ~BIT3; // INT as input
UCB0CTL1 &= ~UCSWRST; // Leave logic reset state. Starts SPI state machine
}
void UART_Init(void)
{
P1SEL = BIT1 + BIT2 ; // P1.1 = RXD, P1.2=TXD
P1SEL2 = BIT1 + BIT2 ;
UCA0CTL1 |= UCSSEL_2; // SMCLK
UCA0BR0 = 0x41; // 8MHz 9600 Baud Rate
UCA0BR1 = 0x03; // 8MHz 9600 Baud Rate
UCA0MCTL = UCBRS0; // Modulation UCBRSx = 1
UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
IE2 |= UCA0RXIE; // Enable USCI_A0 RX interrupt
}
两个配置,实际应用的代码,做参考。