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SFR_8BIT(CALDCO_16MHZ); /* DCOCTL Calibration Data for 16MHz */ SFR_8BIT(CALBC1_16MHZ); /* BCSCTL1 Calibration Data for 16MHz */ SFR_8BIT(CALDCO_12MHZ); /* DCOCTL Calibration Data for 12MHz */ SFR_8BIT(CALBC1_12MHZ); /* BCSCTL1 Calibration Data for 12MHz */ SFR_8BIT(CALDCO_8MHZ); /* DCOCTL Calibration Data for 8MHz */ SFR_8BIT(CALBC1_8MHZ); /* BCSCTL1 Calibration Data for 8MHz */ SFR_8BIT(CALDCO_1MHZ); /* DCOCTL Calibration Data for 1MHz */ SFR_8BIT(CALBC1_1MHZ); /* BCSCTL1 Calibration Data for 1MHz */
5.3.1 DCOCTL, DCO Control Register 7 6 5 4 3 2 1 0 DCOx MODx rw-0 rw-1 rw-1 rw-0 rw-0 rw-0 rw-0 rw-0 DCOx Bits 7-5 DCO frequency select. These bits select which of the eight discrete DCO frequencies within the range defined by the RSELx setting is selected. MODx Bits 4-0 Modulator selection. These bits define how often the f DCO+1 frequency is used within a period of 32 DCOCLK cycles. During the remaining clock cycles (32-MOD) the f DCO frequency is used. Not useable when DCOx = 7.
