SVSH关闭使XT1失效问题

我在做低功耗实验，用的是例程 msp430f665x_lpm3_01.c ，在F5659上测试。目标板是TS430PZ100USB。遇到一个奇怪的问题：

aclk设置为从xt1获得时钟源，要获得最低功耗，需要关闭SVSH及SVMH，SVSL及SVML，用这句实现

    PMMCTL0_H = PMMPW_H;                      // PMM Password   
    SVSMHCTL &= ~(SVMHE + SVSHE);                       // Disable High side SVS 
    SVSMLCTL &= ~(SVMLE+SVSLE);               // Disable Low side SVS

问题在于，当执行完SVSMHCTL &= ~(SVMHE + SVSHE);    后，XT1LFOFFG置1了；后来我又追踪了下，发现实际是

SVSMHCTL &= ~  SVSHE ；起的作用。

没有这句，XT1没有问题，但是得不到最低功耗。

SVSH与XT1有什么关系吗？

附程序：

void main( void )
{
  // Stop watchdog timer to prevent time out reset
    WDTCTL = WDTPW + WDTHOLD;
    // Enable XT1
    UCSCTL6 &= ~(XT1OFF);                     // XT1 On
    UCSCTL6 |= XCAP_3;                        // Internal load cap
    while(BAKCTL & LOCKBAK)                   // Unlock XT1 pins for operation
        BAKCTL &= ~(LOCKBAK); 
    do
    {
        UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG);
                                                // Clear XT2,XT1,DCO fault flags
        SFRIFG1 &= ~OFIFG;                      // Clear fault flags
    }while (SFRIFG1&OFIFG);                   // Test oscillator fault flag

    UCSCTL6 &= ~(XT1DRIVE_3);                 // Xtal is now stable, reduce drive
                                            // strength
    UCSCTL4 &= ~(SELA0 + SELA1 + SELA2);      // Ensure XT1 is ACLK source 
   
//    UCSCTL4 = SELA__REFOCLK;
   
    InitGPIO();
    P1SEL |= BIT0;
    P1DIR |= BIT0;
//    P3SEL |= BIT4;
//    P3DIR |= BIT4;
    // Disable VUSB LDO and SLDO
    USBKEYPID   =     0x9628;                 // set USB KEYandPID to 0x9628 enable access to USB config reg
    USBPWRCTL   &= ~(SLDOEN+VUSBEN);            // Disable the VUSB LDO and the SLDO
    USBKEYPID   =    0x9600;                  // disable access to USB config reg
 
    PMMCTL0_H = PMMPW_H;                      // PMM Password   
    SVSMHCTL &= ~(SVMHE + SVSHE);                       // Disable High side SVS 
        SVSMLCTL &= ~(SVMLE+SVSLE);               // Disable Low side SVS 
    
    
     _EINT();
    TIMER0_A0_INIT();
     __bis_SR_register(LPM3_bits );//+ GIE
     _NOP();
}