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MSP430 SPI配置问题

tuanwei shi
Intellectual 280 points

在配置UCAxCTL1,UCBxCTL1中

UCSSELx    Bits 7-6      USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always

used in slave mode.

00 NA

01 ACLK

10 SMCLK

11 SMCLK

10和11各代表什么？