while(I2cBus.MsgStatus != I2C_MSGSTAT_INACTIVE)
{
temp = I2cBus.MsgStatus;
if(temp == I2C_MSGSTAT_SEND_NOSTOP)
{
// Send Address
// Wait until the STP bit is cleared from any previous master communication.
// Clearing of this bit by the module is delayed until after the SCD bit is
// set. If this bit is not checked prior to initiating a new message, the
// I2C could get confused.
I2cBus.BusStatus = I2C_BUS_ACTIVE;
while(I2C_WriteAddr(DataAddr) != I2C_SUCCESS)
{
}
// for(i=0; i<1000; i++);
I2cBus.MsgStatus = I2C_MSGSTAT_SEND_NOSTOP_BUSY;
}
else if(temp == I2C_MSGSTAT_RESTART)
{
I2caRegs.I2CSAR = AT24C256_ADDR;
I2caRegs.I2CCNT = 8; // Setup how many bytes to expect
// Update message status
I2cBus.MsgStatus = I2C_MSGSTAT_READ_BUSY;
I2caRegs.I2CMDR.all = 0x2C20; // Send restart as master receiver
}
}
下面这个判断一直不执行，不知道什么原因；
CCS5.1的编译器
else if(temp == I2C_MSGSTAT_RESTART)
{
}
