请问TI工程师:
SysCtl_disableSRAMBank(SYSCTL_SRAM_BANK2); 为何变量 SYSCTL_SRAM_BANK2 CCS无法识别 是不是需要加上头文件
我默认的 #include <ti/devices/msp432p4xx/driverlib/driverlib.h> 是不是不够
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请问TI工程师:
SysCtl_disableSRAMBank(SYSCTL_SRAM_BANK2); 为何变量 SYSCTL_SRAM_BANK2 CCS无法识别 是不是需要加上头文件
我默认的 #include <ti/devices/msp432p4xx/driverlib/driverlib.h> 是不是不够
我在TI例程内加入了您的上述语句是可以的
程序如下
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*
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* from this software without specific prior written permission.
*
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* --/COPYRIGHT--*/
/*******************************************************************************
* MSP432 Clock System - Clock Source Initialization
*
* Description: In this code example, the CS_initClockSignal is used to
* initialize every clock on the controller to a non-default value. The
* CS_initClockSignal function is one of the most convenient CS functions as it
* provides a readable/usable method for users to initialize specific clock
* sources to a specific clock signal. Once each clock source is initialized,
* the convenience functions that get clock frequencies are used to assign
* the frequencies to variables. The user can pause the debugger to observe
* that the correct frequencies have been assigned to the variables.
*
* MCLK = MODOSC/4 = 6MHz
* ACLK = REFO/2 = 16kHz
* HSMCLK = DCO/2 = 1.5Mhz
* SMCLK = DCO/4 = 750kHz
* BCLK = REFO = 32kHz
*
* MSP432P401
* ------------------
* /|\| |
* | | |
* --|RST |
* | |
* | |
* | |
* | |
* | |
*
******************************************************************************/
/* DriverLib Includes */
#include <ti/devices/msp432p4xx/driverlib/driverlib.h>
/* Standard Includes */
#include <stdint.h>
/* Statics */
static volatile uint32_t aclk, mclk, smclk, hsmclk, bclk;
int main(void)
{
/* Halting WDT */
MAP_WDT_A_holdTimer();
/* Initializing the clock source as follows:
* MCLK = MODOSC/4 = 6MHz
* ACLK = REFO/2 = 16kHz
* HSMCLK = DCO/2 = 1.5Mhz
* SMCLK = DCO/4 = 750kHz
* BCLK = REFO = 32kHz
*/
MAP_CS_initClockSignal(CS_MCLK, CS_MODOSC_SELECT, CS_CLOCK_DIVIDER_4);
MAP_CS_initClockSignal(CS_ACLK, CS_REFOCLK_SELECT, CS_CLOCK_DIVIDER_2);
MAP_CS_initClockSignal(CS_HSMCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_2);
MAP_CS_initClockSignal(CS_SMCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_4);
MAP_CS_initClockSignal(CS_BCLK, CS_REFOCLK_SELECT, CS_CLOCK_DIVIDER_1);
/*
* Getting all of the frequency values of the CLK sources using the
* convenience functions */
aclk = CS_getACLK();
mclk = CS_getMCLK();
smclk = CS_getSMCLK();
hsmclk = CS_getHSMCLK();
bclk = CS_getBCLK();
SysCtl_disableSRAMBank(SYSCTL_SRAM_BANK2); //susan
/*
* Staying in active mode so that the user can see the values that are put
* in the above registers through the debugger
*/
while (1)
{
}
}
您现在有没有将driverlib的路径加入工程?如下图所示