TMS570LC4357: 程序运行后全局变量全部变为0.

抱歉，我这边没有TMS570LC4357的板子，所以不好测试。

您目前程序实现的主要功能是什么？

user6614170 说：

但是程序中进入不了该条件判断

能否详细说一下或者给出相应的代码？

主要功能是SCI1的DMA发送和接收。

                            /**  HL_sys_main.c  **/
int main(void)
{
/* USER CODE BEGIN (3) */
     user_mian();
/* USER CODE END */

    return 0;
}         
                           /**  user_main.c  **/
#include"user_main.h"

uint8 test=0;
uint8 sendbuff[10]={0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39};
void delay_us(uint32 n)
{
    while(n>0)
    {
        n--;
    }
}
void user_mian(void)
{

    SCI_init();
    SCI_DMA_init();
    dmaEnable();
    while(1)
    {

        if(test==1)
        {
            test=0;
          SCI_Tx(sendbuff,8);
        }
        delay_us(1000);
        delay_us(1000);
        delay_us(1000);
        delay_us(1000);
        delay_us(1000);
        delay_us(1000);
        delay_us(1000);delay_us(1000);
        delay_us(1000);
        delay_us(1000);delay_us(1000);
        delay_us(1000);
        delay_us(1000);delay_us(1000);
        delay_us(1000);
        delay_us(1000);delay_us(1000);
        delay_us(1000);
        delay_us(1000);
        delay_us(1000);
        delay_us(1000);
        delay_us(1000);
    }
}
                        /**  user_main.h  **/
#ifndef COMMUNICATION_USER_MAIN_H_
#define COMMUNICATION_USER_MAIN_H_
#include"SCI.h"
#include"HL_sci.h"
#include"HL_rti.h"
#include"HL_reg_sci.h"
#include "HL_mibspi.h"
#include "HL_sys_vim.h"
#include "HL_reg_dma.h"
#include "HL_sys_dma.h"
#include "HL_reg_lin.h"
#include "HL_sys_core.h"
void user_mian(void);



#endif /* COMMUNICATION_USER_MAIN_H_ */

                       /**  SCI.c  **/
#include"SCI.h"
#include"HL_sci.h"
#include"HL_reg_sci.h"
#include "HL_mibspi.h"
#include "HL_sys_vim.h"
#include "HL_reg_dma.h"
#include "HL_sys_dma.h"
#include "HL_lin.h"
#include "HL_reg_lin.h"
uint8 SCI1_RX_DATA[SCI1_RX_DATA_LEN];
volatile uint8 SCI1_TX_DATA[8]={0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88};
bool DMA_SCI1_TX=true;
void SCI_init(void)
{
       uint8 parity=0 ;
       uint8 bilen=0 ;
       uint8 stopbits=0 ;
       parity=0;
       bilen=8;
       stopbits=1;
       float64   vclk = 75.000 * 1000000.0;
       uint32 f    = 16U;
       uint32 temp;
       float64 temp2;

       /*SAFETYMCUSW 96 S MR:6.1 <APPROVED> "Calculations including int and float cannot be avoided" */
        temp = (f*(9600));
        temp2 = ((vclk)/((float64)temp))-1U;
        temp2 =(uint32) ((temp2 + 0.5)/1);        /* Rounding-off to the closest integer */
               sciREG1->GCR0 = 0U;
               sciREG1->GCR0 = 1U;

               /** - Disable all interrupts */
               sciREG1->CLEARINT    = 0xFFFFFFFFU;
               sciREG1->CLEARINTLVL = 0xFFFFFFFFU;

               /** - global control 1 */
               sciREG1->GCR1 =  (uint32)((uint32)1U << 25U)  /* enable transmit */
                             | (uint32)((uint32)1U << 24U)  /* enable receive */
                             | (uint32)((uint32)1U << 5U)   /* internal clock (device has no clock pin) */
                             | (uint32)((uint32)(stopbits-1U) << 4U)  /* number of stop bits */
                             | (uint32)((uint32)(parity>1? 1:0) << 3U)  /* even parity, otherwise odd */
                             | (uint32)((uint32)(parity>0? 1:0) << 2U)  /* enable parity */
                             | (uint32)((uint32)1U << 1U);  /* asynchronous timing mode */

               /** - set baudrate */
               sciREG1->BRS =(uint32)((uint32)temp2 & 0x00FFFFFFU);  /* baudrate */

               /** - transmission length */
               sciREG1->FORMAT = bilen - 1U;  /* length */

               /** - set SCI1 pins functional mode */
               sciREG1->PIO0 = (uint32)((uint32)1U << 2U)  /* tx pin */
                            | (uint32)((uint32)1U << 1U); /* rx pin */

               /** - set SCI1 pins default output value */
               sciREG1->PIO3 = (uint32)((uint32)0U << 2U)  /* tx pin */
                            | (uint32)((uint32)0U << 1U); /* rx pin */

               /** - set SCI1 pins output direction */
               sciREG1->PIO1 = (uint32)((uint32)0U << 2U)  /* tx pin */
                            | (uint32)((uint32)0U << 1U); /* rx pin */

               /** - set SCI1 pins open drain enable */
               sciREG1->PIO6 = (uint32)((uint32)0U << 2U)  /* tx pin */
                            | (uint32)((uint32)0U << 1U); /* rx pin */

               /** - set SCI1 pins pullup/pulldown enable */
               sciREG1->PIO7 = (uint32)((uint32)0U << 2U)  /* tx pin */
                            | (uint32)((uint32)0U << 1U); /* rx pin */

               /** - set SCI1 pins pullup/pulldown select */
               sciREG1->PIO8 = (uint32)((uint32)1U << 2U)  /* tx pin */
                            | (uint32)((uint32)1U << 1U);  /* rx pin */


               /** - set interrupt level */
               sciREG1->SETINTLVL = (uint32)((uint32)0U << 26U)  /* Framing error */
                                 | (uint32)((uint32)0U << 25U)  /* Overrun error */
                                 | (uint32)((uint32)0U << 24U)  /* Parity error */
                                 | (uint32)((uint32)0U << 9U)  /* Receive */
                                 | (uint32)((uint32)0U << 8U)  /* Transmit */
                                 | (uint32)((uint32)0U << 1U)  /* Wakeup */
                                 | (uint32)((uint32)0U << 0U);  /* Break detect */

               /** - set interrupt enable */
               sciREG1->SETINT = (uint32)((uint32)0U << 26U)  /* Framing error */
                              | (uint32)((uint32)0U << 25U)  /* Overrun error */
                              | (uint32)((uint32)0U << 24U)  /* Parity error */
                              | (uint32)((uint32)0U << 9U)  /* Receive */
                              | (uint32)((uint32)0U << 1U)  /* Wakeup */
                              | (uint32)((uint32)0U << 0U);  /* Break detect */

               /** - Finaly start SCI1 */
               sciREG1->GCR1 |= 0x80U;
}

g_dmaCTRL g_dmaCTRLPKT_SCI1_TX;             /* dma control packet configuration stack */
g_dmaCTRL g_dmaCTRLPKT_SCI1_RX;             /* dma control packet configuration stack */            /* dma control packet configuration stack */
void SCI_DMA_init(void)
{
             while (((sciREG1->FLR & SCI_TX_INT) == 0U) || ((sciREG1->FLR & 0x4) == 0x4))
                     {
                     }
              dmaReqAssign(DMA_SCI1_TRANSMIT_channel, DMA_SCI1_TRANSMIT_REQUEST_LINE);
              g_dmaCTRLPKT_SCI1_TX.SADD      = (uint32)(SCI1_TX_DATA) ;
              g_dmaCTRLPKT_SCI1_TX.DADD      = ((uint32_t)(&(sciREG1->TD))+3);
              g_dmaCTRLPKT_SCI1_TX.CHCTRL    = 0;
              g_dmaCTRLPKT_SCI1_TX.FRCNT = 4;
              g_dmaCTRLPKT_SCI1_TX.ELCNT = 1;
              g_dmaCTRLPKT_SCI1_TX.ELDOFFSET = 0;
              g_dmaCTRLPKT_SCI1_TX.ELSOFFSET = 0;
              g_dmaCTRLPKT_SCI1_TX.FRDOFFSET = 0;
              g_dmaCTRLPKT_SCI1_TX.FRSOFFSET = 0;
              g_dmaCTRLPKT_SCI1_TX.PORTASGN  = PORTA_READ_PORTB_WRITE;
              g_dmaCTRLPKT_SCI1_TX.RDSIZE    = ACCESS_8_BIT;
              g_dmaCTRLPKT_SCI1_TX.WRSIZE    = ACCESS_8_BIT;
              g_dmaCTRLPKT_SCI1_TX.TTYPE     = FRAME_TRANSFER ;
              g_dmaCTRLPKT_SCI1_TX.ADDMODERD = ADDR_INC1;
              g_dmaCTRLPKT_SCI1_TX.ADDMODEWR = ADDR_FIXED;
              g_dmaCTRLPKT_SCI1_TX.AUTOINIT  = AUTOINIT_OFF;

           dmaSetCtrlPacket(DMA_SCI1_TRANSMIT_channel,g_dmaCTRLPKT_SCI1_TX);

           dmaSetChEnable(DMA_SCI1_TRANSMIT_channel, DMA_HW);
          // dmaEnableInterrupt(DMA_SCI1_TRANSMIT_channel, BTC, DMA_INTA);


           dmaReqAssign(DMA_SCI1_REVICE_channel, DMA_SCI1_REVICE_REQUEST_LINE);
           g_dmaCTRLPKT_SCI1_RX.SADD      =((uint32_t)(&(sciREG1->RD))+3)  ;
           g_dmaCTRLPKT_SCI1_RX.DADD      =(uint32)(SCI1_RX_DATA) ;
           g_dmaCTRLPKT_SCI1_RX.CHCTRL    = 1;
           g_dmaCTRLPKT_SCI1_RX.FRCNT = SCI1_RX_DATA_LEN;
           g_dmaCTRLPKT_SCI1_RX.ELCNT = 1;
           g_dmaCTRLPKT_SCI1_RX.ELDOFFSET = 0;
           g_dmaCTRLPKT_SCI1_RX.ELSOFFSET = 0;
           g_dmaCTRLPKT_SCI1_RX.FRDOFFSET = 0;
           g_dmaCTRLPKT_SCI1_RX.FRSOFFSET = 0;
           g_dmaCTRLPKT_SCI1_RX.PORTASGN  = PORTB_READ_PORTA_WRITE;
           g_dmaCTRLPKT_SCI1_RX.RDSIZE    = ACCESS_8_BIT;
           g_dmaCTRLPKT_SCI1_RX.WRSIZE    = ACCESS_8_BIT;
           g_dmaCTRLPKT_SCI1_RX.TTYPE     = FRAME_TRANSFER ;
           g_dmaCTRLPKT_SCI1_RX.ADDMODERD = ADDR_FIXED;
           g_dmaCTRLPKT_SCI1_RX.ADDMODEWR = ADDR_INC1;
           g_dmaCTRLPKT_SCI1_RX.AUTOINIT  = AUTOINIT_ON;

           dmaSetCtrlPacket(DMA_SCI1_REVICE_channel,g_dmaCTRLPKT_SCI1_RX);

            dmaSetChEnable(DMA_SCI1_REVICE_channel, DMA_HW);
            //dmaEnableInterrupt(DMA_SCI1_REVICE_channel, BTC, DMA_INTA);

            sciREG1->SETINT |= SCI_SET_TX_DMA | SCI_SET_RX_DMA | SCI_SET_RX_DMA_ALL;

}

void SCI_Tx (uint8*buff,uint32 len)
{
    uint8 i=0;
    uint8 txdata=0;
        if(DMA_SCI1_TX==true)
        {
            for(i=0;i<len;i++)
            {
               SCI1_TX_DATA[i]=buff[i];
            }
            while (((sciREG1->FLR & SCI_TX_INT) == 0U) || ((sciREG1->FLR & 0x4) == 0x4));
            dmaSetChEnable(DMA_SCI1_TRANSMIT_channel, DMA_HW);

        }
        else
        {
            for(i=0;i<len;i++)
            {
                while ((sciREG1->FLR & (uint32)SCI_TX_INT) == 0U)
                {
                } /* Wait */
                /*SAFETYMCUSW 45 D MR:21.1 <APPROVED> "Valid non NULL input parameters are only allowed in this driver" */
                txdata = buff[i];
                sciREG1->TD = (uint32)(txdata);
            }
        }
}
                            /**  SCI.h  **/
#ifndef COMMUNICATION_SCI_H_
#define COMMUNICATION_SCI_H_
#include "HL_hal_stdtypes.h"
#include "HL_sys_dma.h"
#define SCI1_RX_DATA_LEN 30
#define SCI1_TX_DATA_LEN 30
#define DMA_SCI1_REVICE_channel    DMA_CH18
#define DMA_SCI1_TRANSMIT_channel  DMA_CH19
#define DMA_SCI1_REVICE_REQUEST_LINE    DMA_REQ28
#define DMA_SCI1_TRANSMIT_REQUEST_LINE  DMA_REQ29
#define SCI_SET_TX_DMA      (1<<16U)
#define SCI_SET_RX_DMA      (1<<17U)
#define SCI_SET_RX_DMA_ALL      (1<<18U)





void SCI_init(void);
void SCI_DMA_init(void);
void SCI_Tx( uint8*buff,uint32 len);

#endif /* COMMUNICATION_SCI_H_ */

将此选项勾选后，程序中的变量值变为正常，

但SCI确无法发出有效数据和接收到数据。

user6614170 说：

将此选项勾选后，程序中的变量值变为正常

user6614170 说：

但SCI确无法发出有效数据和接收到数据。

C:\ti\Hercules\HALCoGen\v04.07.01\examples\TMS570LC43x下有相关的sci dma例程，您是否有参考？

另外E2E上有相关的分享贴，您也可以看一下

https://e2e.ti.com/support/archive/launchyourdesign/m/boosterpackcontest/666341 

我的问题和他们不一样，关于DMA和SCI的程序代码是没问题的，我认为是CCS的配置导致的。但是是什么原因导致的就不知道了。

一、在 不勾选Halt the target before any debugger access 情况下，SCI的DMA发送和接收正确。如图：

但是存在一下问题，当我将程序停在断点处时，数据发生了改变。同时程序不会运行到SCI_TX（sendbuff,8）处如图：

二、在 勾选Halt the target before any debugger access 情况下，SCI的DMA发送和接收异常确。如图：

更改test变量后，程序可以运行到SCI_TX（sendbuff,8），但是SCI的DMA发送有问题，处如图：

请问您现在问题解决了吗？

user6614170 说：

Halt the target before any debugger access

在任何调试器访问之前暂停目标 

user6614170 说：

在 勾选Halt the target before any debugger access 情况下，SCI的DMA发送和接收异常确

是不是有可能是暂停造成的时序不对？