Other Parts Discussed in Thread: HALCOGEN,
使用DMA配置SCI1输出时，sci1始终输出0，不知道是什么原因，代码如下：
/* USER CODE BEGIN (2) */
#define D_SIZE 8
uint32 TX_DATA[D_SIZE]; /* DMA source buffer */
g_dmaCTRL g_dmaCTRLPKT;
void load_data(void)
{
int i;
for (i=0;i<D_SIZE;i++)
{
TX_DATA[i] = i;
}
}
/* USER CODE END */
int main(void)
{
/* USER CODE BEGIN (3) */
sciInit();
load_data();
/* - DMA Configuration */
/* Enable DMA */
dmaEnable();
/* Refer Data sheet - Default DMA Request Map section */
dmaReqAssign(DMA_CH0,DMA_REQ29);
/* - configuring dma control packets */
g_dmaCTRLPKT.SADD = (uint32)(&TX_DATA); /* source address */
g_dmaCTRLPKT.DADD = (uint32_t)(&(sciREG1->TD)); /* destination address */
g_dmaCTRLPKT.CHCTRL = 0; /* channel control */
g_dmaCTRLPKT.FRCNT = D_SIZE; /* frame count */
g_dmaCTRLPKT.ELCNT =1 ; /* element count */
g_dmaCTRLPKT.ELDOFFSET = 0; /* element destination offset - is required? */
g_dmaCTRLPKT.ELSOFFSET = 0; /* element source offset - is required? */
g_dmaCTRLPKT.FRDOFFSET = 0; /* frame detination offset - is required? */
g_dmaCTRLPKT.FRSOFFSET = 0; /* frame source offset - is required? */
g_dmaCTRLPKT.PORTASGN = PORTA_READ_PORTB_WRITE; /* port b */
g_dmaCTRLPKT.RDSIZE = ACCESS_32_BIT; /* read size */
g_dmaCTRLPKT.WRSIZE = ACCESS_32_BIT; /* write size */
g_dmaCTRLPKT.TTYPE = FRAME_TRANSFER ; /* transfer type */
g_dmaCTRLPKT.ADDMODERD = ADDR_INC1; /* address mode read */
g_dmaCTRLPKT.ADDMODEWR = ADDR_FIXED; /* address mode write */
g_dmaCTRLPKT.AUTOINIT = AUTOINIT_OFF; /* autoinit (loop) */
dmaSetCtrlPacket(DMA_CH0,g_dmaCTRLPKT);
/* - setting dma control packets for transmit */
dmaSetCtrlPacket(DMA_CH0,g_dmaCTRLPKT);
/* - setting the dma channel to trigger on h/w request */
dmaSetChEnable(DMA_CH0, DMA_HW);
/* Enable TX DMA */
sciREG1->SETINT |= (1 << 16U);
while(1); /* loop forever */
/* USER CODE END */
return 0;
}
