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GPIOPinConfigure(GPIO_PF0_SSI1RX); //配置PF0复用功能为SSI1RX,数据接收线
GPIOPinTypeSSI(GPIO_PORTF_BASE, GPIO_PIN_0|GPIO_PIN_1 | GPIO_PIN_2); //配置PF1,PF2,PF3供SSI1使用
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);//使能GPIOF
HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;//解锁
HWREG(GPIO_PORTF_BASE + GPIO_O_CR) |= 0x01;//确认
HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = 0;//重新锁定
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI1); //使能SSI1外设
这是解锁用的代码
我把解锁的代码注释掉重新下载程序又正常了 请问该如何正确解锁?
只有JTAG相关的四个脚和NMI复用的2个脚需要解锁。其他脚在功能切换时不需要考虑解锁。
具体方法是在Lock寄存器写入KEY,然后再操作commit寄存器就好了。具体方法如下:
10.2.4 Commit Control
The GPIO commit control registers provide a layer of protection against accidental programming of
critical hardware peripherals. Protection is provided for the GPIO pins that can be used as the four
JTAG/SWD pins and the NMI pin (see “Signal Tables” on page 1330 for pin numbers). Writes to
protected bits of the GPIO Alternate Function Select (GPIOAFSEL) register (see page 671), GPIO
Pull Up Select (GPIOPUR) register (see page 677), GPIO Pull-Down Select (GPIOPDR) register
(see page 679), and GPIO Digital Enable (GPIODEN) register (see page 682) are not committed to
storage unless the GPIO Lock (GPIOLOCK) register (see page 684) has been unlocked and the
appropriate bits of the GPIO Commit (GPIOCR) register (see page 685) have been set.