I was debugging the STC of the TMS570LS3137.And I met a big problem that I could not download the program into the flash. I know this chip cannot debug during the STC, but why I cannot write into the flash yet.
I infer that it may drop-dead halt during the STC. I need to make my chip escape the STC so that I can download the new program and continue debugging.HELP!!
Some details about what I have done.
I use HCG software to create the program of STC.But this program just make STC run in startup, so I modify some codes to make STC run in MAIN.I konw I need to backup status of CPU and restore after STC.When I download my program into the chip second time, I get this"DBGEN is not asserted"and"Write failed (target is running) at Memory address 0xFFFFFF48".Also，I use SEGGER J-Flash ARM to connect the target，I get this"DBGEN is not asserted.Failed to connect". I have no idea to handle this problem.BTW I used IAR.
