Part Number: DRV8316
The power-up sequence is normal, as shown in the figure below for the DRV8316's VM and FAULT pins. SLEEP has been kept low. The blue trace is the VM pin, and the yellow trace is the FAULT pin.
However, when the MCU reads the DRV8316's status register, the value at 0x02 is 0x80. According to the documentation, this indicates that the device has entered Test Mode. Is there any official documentation regarding Test Mode? Because in this mode, under 6x mode and SPI control, the low-side bridges are turning on erroneously and consistently. For example, when channel A is commanded to turn on, channel C turns on instead; when channel B is commanded to turn on, channel C turns on. This pattern of erroneous switching is consistent. Why does this happen?
