Hi TI Team and Community,
I’m debugging a push-pull converter using the UCC28C43 PWM controller with UCC27714 high-speed gate drivers, aiming for a 100W isolated DC-DC design.
Using CSD19502Q5B NexFETs for primary switching, 100kHz fixed frequency, 24V input, 12V/8A output.
Despite careful layout, short loops, and using a 4-layer PCB, I’m facing:
EMI failures (peaks around 180–250MHz) detected with near-field probes and during pre-compliance tests.
MOSFET case temps >85°C under full load, even with heatsinks and ~2m/s forced airflow.
Snubbers reduce EMI but increase switching losses, pushing temps higher.
Shielding improves EMI but raises thermal resistance further.
Debug Steps Taken:
Added RCD snubber: 100Ω, 1nF, fast diode → reduced voltage spikes but increased MOSFET heating.
Input π-filter (10µH + 47µF low ESR) → reduced common-mode noise.
Spread-spectrum modulation on UCC28C43 (+/-5%) → slight EMI peak reduction.
Careful ground partitioning and minimized high di/dt loops.
Questions:
1️⃣ What’s the recommended method to optimize snubber tuning on push-pull using UCC28C43 without excessive switching loss?
2️⃣ Any best practices for balancing dV/dt control and EMI with UCC27714 while avoiding higher losses?
3️⃣ Have you or customers used active clamp techniques with UCC28C43 in push-pull to manage leakage energy and EMI simultaneously?
4️⃣ Are there reference layouts using CSD19502Q5B with UCC27714 in push-pull designs that handle thermal paths effectively while minimizing radiated EMI?
5️⃣ Any application notes beyond SLUA551 or TIDU261 specifically focusing on EMI + thermal tradeoffs in push-pull with these TI parts?
Additional Details:
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Transformer: Custom, 1µH leakage (measured), tight coupling but leakage spikes remain.
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Ambient: 25°C during test, forced airflow.
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Switching frequency: 100kHz fixed.
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Primary MOSFET current peaks around 12–14A during transients.
Why It Matters:
We aim to pass EMI compliance while ensuring MOSFET junction temps stay well below 100°C for reliability, but balancing these goals in push-pull with high di/dt and tight thermal constraints has proven challenging.
If you have practical debug tips, reference designs, or recommended measurement methods for catching hidden EMI sources early while managing thermal performance, it would help greatly.
Thanks for your support!