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TUSB1046-DCI: During the I2C communication process, when ACK, the CLK and DATA almost simultaneously drop to the low level, resulting in a large negative voltage overshoot.

Part Number: TUSB1046-DCI


Hi TI Team!

We use CYPD3125 as the master device and TUSB1046 as the slave device. We use I2C communication. When the last bit of a byte is 1, TUSB1046 will immediately pull down SDA to respond after the 8th CLK transition. When both CLK and SDA have the same falling edge, it causes a significant negative voltage overshoot on CLK and SDA.

Disconnect the I2C connection of TUSB1046. After CYPD3125 writes the 8th bit of a byte, 2 us after the 8th CLK falling edge, the SDA bus is released. Therefore, when communicating normally with TUSB1046, after writing the 8th bit, the SDA bus has not been released yet. TUSB1046 then pulls down the SDA, causing the CLK and SDA to drop almost simultaneously at the falling edge. How can this problem be solved?

  • 您好,

    已经收到了您的案例,调查需要些时间,感谢您的耐心等待。

  • 您好,

         从您图示中的波形来看,猜测I2C选用的是3.3V电平。

        TUSB1046支持的 SCL频率最高1MHZ,您用的是多少?    

       根据I2C时序, SCL为高时,SDA状态保持不变;SCL为低时(tHDDAT时间后),SDA可以改变。

    When the last bit of a byte is 1, TUSB1046 will immediately pull down SDA to respond after the 8th CLK transition

         这个字节是是有效的数据帧中定义的数据吗?从您描述情况来看,这像是一个ACK。

         在芯片数据手册7.5 Programming中详细描述了I2C传输过程,请检查您的I2C时序是否与之匹配。

  • 是的,I2C使用的是3.3V电平;

    I2C目前使用的是100K的通信频率;

    这个字节是有效数据帧的定义的数据,我们解析了I2C波形,是往TUSB1046中写:0x8E-0x0A-0x03,由于0x03是00000011,第8位为1,TUSB1046在第8个CLK的下降沿马上拉低SDA,导致了大的负过冲

  • 您好,

          

           上面是I2C的写入流程,在每个字节传输后,TUSB1046-DCI都会ACK响应,

           因此,在数据传输完成后,请等待ACK后,主机再发送STOP。