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TPS65224-Q1: TPS6522435RAHRQ1

Yiming Fang
Prodigy 10 points
Part Number: TPS65224-Q1

Hello Ti Team:

During the testing phase, I encountered two issues that require resolution, and I would appreciate your assistance in addressing them.

1）During the power-down sequence of VCCA, the NRSTOUT signal initially transitions to a logic low level, followed by a transient voltage spike and a gradual power-off decay. This behavior is illustrated in the figure below. Could you please provide an explanation for this phenomenon?

2）When Buck4 is in the output state, if an electronic load is initially used to draw a current of 2 A and the chip is subsequently powered on abruptly, a phenomenon resembling a secondary power-up event may occur, as illustrated in the figure below. Could you please clarify the underlying cause of this behavior?

Thanks！

Best Regards！

  • 0
    TI__Mastermind 35115 points

    Hi,

    We have received your post and the investigation will take some time. Thank you for your patience.

  • 0 回复 Taylor
    TI__Mastermind 35115 points
    1. The nRSTOUT goes high again due to VCCA going under the UVLO level at which point PMIC is completely powered off and can't pull the nRSTOUT pin low. Since there is still charge in the rail to which nRSTOUT is pulled up to it will follow this voltage.
    2. Probably due to VCCA not being high enough when the load is first turned on and the VCCA drops below the monitoring threshold. For more detailed analysis I would need to know the interrupt information, the load rise time and delay between ENABLE signal (or buck4 being enabled) and the shutdown.