• 状态 TI Thinks Resolved
  • 回复 2 回复
  • 答案 1 答案
  • 订户 58 订户
  • 视图 74 视图
  • 用户 0 会员在此处
选项
选项
相关

LM5171: Maximum ISET DC Bias Difference Between Channels in Two-Phase Interleaved Bidirectional Operation

Qiufan Yin
Prodigy 10 points

Part Number: LM5171

I am designing a bidirectional DC-DC converter using the LM5171 in Seamless Bidirectional Operation, with a two-phase interleaved parallel configuration. I expect the current to be zero when the output-side voltage is within the dead zone (40 V to 50 V). When the output side is in the dead zone, the MCU adjusts ISET until the output current reaches zero.
My questions are:
  1. What is the maximum allowed difference in the ISET DC bias voltage between the two channels?
  2. Do I need to adjust the ISET of the two channels separately to avoid excessive circulating current?

 

  • 0
    TI__Mastermind 43485 points

    Hello, we have received your case and the investigation will take some time. Thank you for your patience.

  • 0 回复 Eirwen
    TI__Guru 52330 points

    1. TI does not publish a numeric tolerance for ISET1‑to‑ISET2 mismatch, because the recommended architecture for multiphase parallel operation removes the variable entirely:

    Since the intended design ties ISET1 and ISET2 to the same physical node, there is no "allowed mismatch" — by design it should be 0 V.

    2. Tie them together — do not drive them independently.