BQ25856-Q1: Hardware problem about BQ25856-Q1

Part Number: BQ25856-Q1

Application background:
The BQ25856 is used as the main control chip for charging an 8-cell LFP lithium battery, the max charging current is 20A. Throughout the entire charging process, the output voltage (battery voltage) continuously changes, and the BQ25856 operates in buck mode and buck-boost mode.

Problem:
When the BQ25856 operates in buck mode, the charging module works stably, generates little heat, and has small current ripple.
When the BQ25856 operates in buck-boost mode, the charging module has audible noise, generates a large amount of heat, has large current ripple, and poor EMC characteristics.

  • Hello, we have received your case and the investigation will take some time. Thank you for your patience.

  • 您好

    请分享您的原理图和相关波形图。

  • SCH and waveform.zip
    Hello, Daniel
    Please refer to the attachment.
    Thanks.

  • 您好

    有触发保护吗?还是只是输出状态不稳定?

  • Hello Daniel
    没有触发保护,只是输出状态不稳定。

  • 您好

    The device integrates all the loop compensation, thereby providing a high density solution with ease of use. At startup, the device toggles the SW node for about 40 ms to determine the correct compensation values for a given set of passives. If the battery is above VBAT_LOWV, then SW2 is toggled. SW1 is toggled otherwise. The charger employs a synchronous buck-boost converter that allows charging from a wide range of input voltage sources. The charger operates in buck, buck-boost or boost mode. The converter can operate uninterruptedly and continuously across the three operation modes. During buck-boost mode, the converter alternates a SW1 pulse with a SW2 pulse, with effective switching frequency interleaved among these pulses for highest efficiency operation. During boost mode operation, the HS FET is forced to turn on for 225 ns in each switching cycle to ensure inductor energy is delivered to the output, effectively limiting the maximum boosting ratio. For example, when device is configured to switch at 500 kHz, the switching period is 2 μs, yielding a duty cycle limit of (1 - 0.225 μs/2 μs) = 88.75%. Given a 5-V input, this translates to a maximum 44-V output assuming 100% efficiency. The true output will be lower than this ideal limit. At lower switching frequencies, the maximum duty cycle increases, making the limitation less significant.

    请您参考这部分说明进行SW1和SW2的均衡。

    https://www.ti.com.cn/tool/cn/download/BQ25756-DESIGN-CALC

    这是官方给出的相关计算工具。