主动均衡问题

void EMB_Stop(int nDev_ID, int channel)
{
 int nRead;
 BYTE bTemp;

 switch(channel)
 {
 case 1:
  EMB_SetCS(nDev_ID, nCS_BOTSTACK);
  break;
 case 2:
  EMB_SetCS(nDev_ID, nCS_BOTSTACK);
  break;
 case 3:
  EMB_SetCS(nDev_ID, nCS_MIDSTACK);
  break;
 case 4:
  EMB_SetCS(nDev_ID, nCS_MIDSTACK);
  break;
 case 5:
  EMB_SetCS(nDev_ID, nCS_MIDSTACK);
  break;
 case 6:
  EMB_SetCS(nDev_ID, nCS_MIDSTACK);
  break;
 case 7:
  EMB_SetCS(nDev_ID, nCS_MIDSTACK);
  break;
 case 8:
  EMB_SetCS(nDev_ID, nCS_MIDSTACK);
  break;
 case 9:
  EMB_SetCS(nDev_ID, nCS_MIDSTACK);
  break;
 case 10:
  EMB_SetCS(nDev_ID, nCS_TOPSTACK);
  break;
 case 11:
  EMB_SetCS(nDev_ID, nCS_TOPSTACK);
  break;
 case 12:
  EMB_SetCS(nDev_ID, nCS_TOPSTACK);
  break;
 case 13:
  EMB_SetCS(nDev_ID, nCS_TOPSTACK);
  break;
 case 14:
  EMB_SetCS(nDev_ID, nCS_TOPSTACK);
  break;
 case 15:
  EMB_SetCS(nDev_ID, nCS_TOPSTACK);
  break;
 case 16:
  EMB_SetCS(nDev_ID, nCS_TOPSTACK);
  break;
 }

 int EMB_COMMAND = 0x00;

#ifndef TMS570SPI
 WriteReg(nDev_ID, 121, (EMB_COMMAND>>3&0x01)<<3, 1, FRMWRT_SGL_NR); // set GPIO output (SDO bit 3 - charge=0/discharge=1)
 WriteReg(nDev_ID, 121, (EMB_COMMAND>>3&0x01)<<3 | EMB_SCLK, 1, FRMWRT_SGL_NR);   // set GPIO output (SCLK high)
 WriteReg(nDev_ID, 121, (EMB_COMMAND>>2&0x01)<<3, 1, FRMWRT_SGL_NR); // set GPIO output (SCLK low, SDO bit 2 - channel bit 2)
 WriteReg(nDev_ID, 121, (EMB_COMMAND>>2&0x01)<<3 | EMB_SCLK, 1, FRMWRT_SGL_NR);   // set GPIO output (SCLK high)
 WriteReg(nDev_ID, 121, (EMB_COMMAND>>1&0x01)<<3, 1, FRMWRT_SGL_NR); // set GPIO output (SCLK low, SDO bit 1 - channel bit 1)
 WriteReg(nDev_ID, 121, (EMB_COMMAND>>1&0x01)<<3 | EMB_SCLK, 1, FRMWRT_SGL_NR);   // set GPIO output (SCLK high)
 WriteReg(nDev_ID, 121, (EMB_COMMAND&0x01)<<3, 1, FRMWRT_SGL_NR);    // set GPIO output (SCLK low, SDO bit 0 - channel bit 0)
 WriteReg(nDev_ID, 121, (EMB_COMMAND&0x01)<<3 | EMB_SCLK, 1, FRMWRT_SGL_NR);      // set GPIO output (SCLK high)
 WriteReg(nDev_ID, 121, 0, 1, FRMWRT_SGL_NR);   // set GPIO output (SCLK low, SDO 0)
 WriteReg(nDev_ID, 121, EMB_SCLK, 1, FRMWRT_SGL_NR);   // set GPIO output (SCLK high)
 WriteReg(nDev_ID, 121, 0, 1, FRMWRT_SGL_NR);   // set GPIO output (SCLK low, SDO 0)
 WriteReg(nDev_ID, 121, EMB_SCLK, 1, FRMWRT_SGL_NR);   // set GPIO output (SCLK high)
 WriteReg(nDev_ID, 121, 0, 1, FRMWRT_SGL_NR);   // set GPIO output (SCLK low, SDO 0)
 WriteReg(nDev_ID, 121, EMB_SCLK, 1, FRMWRT_SGL_NR);   // set GPIO output (SCLK high)
 WriteReg(nDev_ID, 121, 0, 1, FRMWRT_SGL_NR);   // set GPIO output (SCLK low, SDO 0)
 WriteReg(nDev_ID, 121, EMB_SCLK, 1, FRMWRT_SGL_NR);   // set GPIO output (SCLK high)
 WriteReg(nDev_ID, 121, 0, 1, FRMWRT_SGL_NR);   // set GPIO output (SCLK low, SDO 0)
 delayus(200);
 EMB_SetCS(nDev_ID, 0);
 delayms(2); // required to let current ramp down
 // set GPIO dir - EMB1428_RST high by changing bit 5 to input (ensure bit 1 is still set to input, since CS is disabled above)
 nRead = ReadReg(nDev_ID, 120, &bTemp, 2, 0); // Read GPIO dir register
 WriteReg(nDev_ID, 120, (bTemp & 0x0C), 1, FRMWRT_SGL_NR);
#else
 g_ui32EMB1428Status = spiTransferByte(spiREG1, 0);
// delayus(200);
 EMB_SetCS(nDev_ID, 0);
 delayms(2); // required to let current ramp down
 gioSetBit(gioPORTA, 6, 1); //RS_EMB128 high, Put 1428 in reset.
 if((g_ui32EMB1428Status &(0xF0)) != 0xA0)
 {
  while (1);//youwenti
 }
#endif
 delayus(200);
}