驱动bq76952时,发现IIC的应答很不稳定,发送设备地址0x10后,有时有应答,有时候没有,大多时候都没有应答,通信不成功。
,这是没有收到应答信号的波形。
这是有收到应答信号的时钟波形,应答信号很不稳定,循环进行写寄存器操作,能收到应答信号的次数很少。
这是部分原理图。cpu与器件通过隔离芯片连接,把隔离芯片取下后,直接连接,效果一样。请TI专家指导下,谢谢!
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驱动bq76952时,发现IIC的应答很不稳定,发送设备地址0x10后,有时有应答,有时候没有,大多时候都没有应答,通信不成功。
,这是没有收到应答信号的波形。
这是有收到应答信号的时钟波形,应答信号很不稳定,循环进行写寄存器操作,能收到应答信号的次数很少。
这是部分原理图。cpu与器件通过隔离芯片连接,把隔离芯片取下后,直接连接,效果一样。请TI专家指导下,谢谢!
您好,请参考下面内容:
What is the clock frequency on the SCL pin? It looks like the speed changes in the first waveform.
Are all of the timing requirements in the datasheet being followed? How much time is there between I2C transactions? Are the voltages stable on REG18, REG1, REG2, and VCC3.3?
您好,请参考下面的内容。
It is hard to tell from the scope capture, but is the SDA setup time meeting the specification. SDA must be ready 100 ns before the rising edge of SCLK. The scope capture and logic analyzer data almost look like the host is trying to use the falling edge of SCLK instead of the rising edge.
Also, can you try to run the I2C at 100 kHz to see if the problem still shows?