您好，查询SN65472-EP的规格书发现如下一句解释，想请问exposed (power) pad 这里的意思是散热盘与PCB的power连接吗？我们常见的是与GND地连接，还请帮忙确认下，
另外这个exposed (power) pad是与芯片内部的GND相连接吗？谢谢
The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
