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BQ24297: BQ24297RGER

Part Number: BQ24297
Other Parts Discussed in Thread: BQ24296,
21年年份的IC:电池端不接电池的时候,VSYS会震荡输出,电池端输出0.7V。
22年年份的IC:电池端不接电池的时候,VSYS输出3.6V后,VSYS和电池端都会停止输出。
请问,这种现象是IC内部改动了电源管理逻辑吗?
 
  • 您好,请确认REG01[3:1]的参数设置。

  • bq24296_set_sys_min(0x5);代码初始化中配置的是0x5

  • void bq24296 set sys min(unsigned int val)
    unsigned int ret = 0;
    ret = bq24296_config interface((unsigned char) (bq24296 CON1)
    (unsigned char)
    (val)
    (unsigned char)
    (CON1 SYS MIN MASK)
    (unsigned char)
    (CON1 SYS MIN 

  • 你好,请帮忙确认此问题要怎么解决?谢谢!

  • 您好,正在询问更了解这款芯片的TI工程师,稍后回复。

  • 您好,是否在未连接电池端子时禁用充电?如果禁用充电,即使没有连接电池,VSYS 有保持输出。

    在波形捕获中看到这种行为将会很有帮助。请在未连接电池且启用充电的情况下抓一下VSYS的波形。

  • Hi Star Xu

    是否方便跟我直接邮箱联系?我的邮箱号是huangbaoyi@wisky.com.cn

  • 未连接电池时,CE脚拉高禁用电池充电;

    以下是未连接电池且启用充电的情况下VSYS的波形

  • 另外还测了未连接电池,电池充电禁用(CE脚拉高)的波形,禁用充电的话,VSYS就平稳没有震荡,以下是波形

  • 您好,请参考下面内容

    I have confirmed the below waveform is the expected behavior of the BQ24297 when charge is enabled, but battery is not connected. Both SYS and BAT voltage should oscillate. 

    Since the customer waveform does not match this expectation I have a few additional questions. 

    1)Can you provide a more detailed explanation of test procedure? What is triggering VSYS to initially rise in the waveform above? At what point in the waveform is the customer pulling /CE pin low? What is the expected current draw of the load attached to SYS? 

    2)Can you provide a waveform showing VBUS, VSYS, and VBAT instead of just VSYS? 

    3)Does the device behave as expected when a battery is connected? 

  • (1)主板不接电池的情况下,接入充电器:BQ24297输入5V,这时CE PIN上拉到RENG电压。VSYS会上电2-3S后掉落,VBAT没有上电。附在VSYS上的负载预期电流是2A。
    我们更换不同批次的BQ24297,得到的波形不一致,现在测量的波形是最近生产的IC,比较旧的IC VSYS会持续输出来。


    (2)以下是VBUS,VSYS,VBAT,CE的上电波形:

    (3)当连接电池时,设备可以正常工作,可以充电,当电池完全没电保护的时候,无法激活电池,就相当于没连接电池的情况,连接充电器充电也无法激活电池。

  • 您好,感谢您的波形,,需要做一些研究和测试再回复您。

  • 您好,can you help to get more information regarding the protection circuit when the battery is completely out of power? How does the circuit disconnect the battery terminal from the BAT pin? What is the mechanism to reconnect the battery to BAT pin (for example does the protector require a certain voltage level)? 

    Please have double check expected current draw. Is current draw expected to be minimal at initial powerup? If current draw was 2A right at power on VSYS would never rise above 2V due to the soft-start feature described on page 21 of the datasheet. When I test on EVM even a light load such as 200mA prevents SYS from ramping up when no battery is attached. 

    Then focusing on the most recent waveform where /CE is always low there appears to be a key event which pulls both BAT and SYS low. I have a few questions regarding this event. 

    -Is there a spike in current draw either at SYS or even possibly BAT? 

    -Can you capture SW node voltage along with VSYS with /CE pulled low? I would like to check if buck converter is potentially stopping. 

    -What is status of all registers following the drop in VSYS and VBAT?

    -Following the drop do you ever observe VSYS or VBAT being powered again? 

  • can you help to get more information regarding the protection circuit when the battery is completely out of power? How does the circuit disconnect the battery terminal from the BAT pin? What is the mechanism to reconnect the battery to BAT pin (for example does the protector require a certain voltage level)? 
    -->电池对外放电,电池电压低于2.8V后,电池会截止保护,不在对外输出电压;在电池保护不输出电压后,需要在BAT脚输出电压到电池,给电池充电激活,电池激活后会继续对外输出电压。
    Please have double check expected current draw. Is current draw expected to be minimal at initial powerup? If current draw was 2A right at power on VSYS would never rise above 2V due to the soft-start feature described on page 21 of the datasheet. When I test on EVM even a light load such as 200mA prevents SYS from ramping up when no battery is attached. 
    -->VSYS会给到主控端供电,在开机过程中,电流是动态的,从几十个mA到1A多

    -Is there a spike in current draw either at SYS or even possibly BAT? 
    -->现在是在关机状态下测量电池没电的时候,VSYS和BAT的状态,关机状态下,进行关机充电,正常不会有过大的电流峰值。

    -Can you capture SW node voltage along with VSYS with /CE pulled low? I would like to check if buck converter is potentially stopping. 
    -->以下分别是CE拉低时,有电池和无电池时,VSYS和SW 的波形

  • -Following the drop do you ever observe VSYS or VBAT being powered again? 
    -->在掉电后,没有观察到VSYS和VBAT有重新上电

  • 充电状态下寄存器的值

  • 开机后寄存器的值