TPS650332-Q1: I2C_INVALID_ADDR_ERR will happen when read 2Ch register

Hu Yuting

Prodigy 10 points

Part Number: TPS650332-Q1

Dear team:

When i read 2Ch register , I2C_INVALID_ADDR_ERR will happen.

But i checked all registers i read, they were correct.

So why bit1 of 2Ch register become 1 ?

17 天前

0 Taylor 15 天前

TI__Intellectual 2420 points

Hi Yuting,

For your query, please post your query in E2E Forum as link below.
https://e2e.ti.com/
TI's product line experts will answer your question.

0 Hu Yuting 15 天前回复 Taylor

Prodigy 10 points

Hi team:

I searched for relevant issues in the above link.
In the question, it is mentioned that "Enabling I2C CRC enables the I2C-INVALID-ADDR-ERR check" and "The GUI automatically reads register 0x4A (EEPROM-PROG-CMD) as part of the register map, but the device sees this register as an invalid address to read (all other registers in the TPS650332-Q1 register map are valid addresses)".
In my design, I also enabled I2C CRC. But 0x4A is actively read, not automatically read by the chip. When I block the code reading 0x4A, "I2C-INVALID-ADDR-ERR" no longer occurs; But does the 0x4A register affect I2C CRC detection? Can I block reading code of 0x4A?

0 Taylor 14 天前回复 Hu Yuting

TI__Intellectual 2420 points

Hi Yuting,

I understand your question, but please post on the E2E forum.

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TPS650332-Q1: I2C_INVALID_ADDR_ERR will happen when read 2Ch register