Other Parts Discussed in Thread: TPS3820
此芯片在说明里面有描述这段文字；
The watchdog timer can be disabled by disconnecting the WDI pin from the system. If the WDI pin detects that it is in a high-impedance state the TPS3820/3/4/8-xx-Q1 will generate its own WDI pulse to ensure that RESET
does not assert. If this behavior is not desired place a 1-kΩ resistor from WDI to ground. This resistor will help ensure that the TPS3820/3/4/8-xx-Q1 detects that WDI is not in a high-impedance state.
这里描述，如果芯片WDI引脚检测到高阻抗，则内部产生时钟，防止发生复位事件。
请问，这个逻辑或者功能，主要是考虑到什么因素，有这个功能。
