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Current peaks through the internal bootstrap diode are expected during two main conditions. The first of those being startup when the first LO pulses occur to charge the bootstrap capacitor. The second being a smaller pulse during steady state conditions when LO pulses to recharge the bootstrap capacitor however much was discharged during the prior HO pulse.
The 4.6A that you are seeing is not a concern during these two operating conditions. What conditions are you seeing this peak current? Can you share the waveforms of Current, HO and LO to see that operation? It would also be good to monitor HB-HS to see the bootstrap capacitor voltage and ensure that that ripple is not too great and violating HB UVLO.
One way to limit this forward current is to optimize the bootstrap capacitor size based on your system and operating conditions. Too large of a bootstrap capacitor will increase the current seen during startup and too small of a bootstrap capacitor will create a large HB-HS ripple and require a higher current to recharge each cycle. Here is an application note on sizing this capacitor as well as the VDD bypass capacitors: Bootstrap Circuitry Selection for Half-Bridge Configurations
