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c6748无法连接仿真器

dsp china
Intellectual 260 points
Other Parts Discussed in Thread: SECDEVTOOL-OMAPL138C6748, OMAP-L138

现有一块6748的板子，同一块板子，不同时间做的，以前做的都能正常连上560仿真器，现在做的怎么都连不上，量测1.2V,1.8V,3.3V的电源都正常，RESET信号也正常，24M晶振也起振，连接仿真器出错，信息如下：

Error connecting to the target:
Error 0x80000240/-1146
Fatal Error during: Initialization, OCS,
Invalid data was scanned by the emulation controller.
Verify the board setup to make sure the scan chain is properly
defined.
If the setup is correct, then RESET EMULATOR.  This will disconnect each
target from the emulator.  The targets should then be power cycled
or hard reset followed by an emureset and reconnect to each target.



Board Name: OMAPL138_TIXDS560
Cpu Name: C6400PLUS_0

Abort:        Close Code Composer Studio.
Retry:        Try to connect to the target again.
Cancel:        Remain disconnected from the target
Diagnostic:    Run diagnostic utility.

请问是什么问题

  • 0
    TI__Guru**** 357097 points

    “Board Name: OMAPL138_TIXDS560” 请问在target configuration配置里是否选择了C6748的驱动？

  • 0 回复 Shine
    Intellectual 260 points

    是的，连以前做的板子都OK，连现在做的就出错，板子没做任何改动，在板子上量测以前做的板和现在做的板，电源和复位信号都一样，除了BGA芯片里面无法测得，其它地方都测了，没有什么不一样，实在不知是哪里出错了

  • 0 回复 dsp china
    Intellectual 260 points

    以前用的6748是：

    TMS320C6748BZWT

    34A31RW GI 450

    527 ZWT

    现在用的6748是：

    TMS320C6748BZWT E

    3BACYIW GI D450

    527 ZWT

    这两个芯片应该没有什么区别吧

  • 0 回复 dsp china
    TI__Guru**** 357097 points

    有区别，E是加密版本，每次上电后需要先解密后才能连JTAG，调试阶段建议用不带E版本。请参考下面的说明。
     http://processors.wiki.ti.com/index.php/Basic_Secure_Boot_for_OMAP-L138_C6748#How_to_debug_secure_device.3F

  • 0 回复 Shine
    Intellectual 260 points

    为何跟这款加密版的文档河软件下载不了

  • 0 回复 dsp china
    TI__Guru**** 357097 points

    是这个软件工具下载不了么？

    http://www.ti.com/tool/secdevtool-omapl138c6748

  • 0 回复 dsp china
    TI__Guru**** 357097 points

    请问是链接打不开吗？下载时报什么错误信息？

  • 0 回复 Shine
    Intellectual 260 points

    被拒绝下载，你就告诉我怎样解密，连上仿真器，看来是更要强烈支持华为这样做国人的处理器的企业

  • 0 回复 dsp china
    TI__Guru**** 357097 points

    试试填申请表的时候不要选"Military"，选"Civil"。

    解密步骤先修改ini文件，然后由软件包里的SecureHexAIS_OMAP-L138.exe工具将ini文件配置到AIS里，再用GenericSecureUartHost.exe从uart下载进去就可以，看一下下面E2E的帖子。
    https://e2e.ti.com/support/dsp/tms320c6000_high_performance_dsps/f/115/t/431553

     

  • 0 回复 Shine
    Intellectual 260 points

    用 非加密版uart boot host给非加密版6748从串口写入以前用仿真器写入的AIS bin文件，现在怎么一直没完成，几个小时了，显示如下：

    (AIS Parse): Read magic word 0x41504954.
    (AIS Parse): Waiting for BOOTME... (power on or reset target now)
    (AIS Parse): BOOTME received!
    (AIS Parse): Performing Start-Word Sync...
    (AIS Parse): Performing Ping Opcode Sync...
    (AIS Parse): Processing command 0: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Processing command 1: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...

    用GenericSecureUartHost给加密版6748通过UART0写入的AIS bin文件，如下：

    (AIS Parse): Read magic word 0x41504954.
    (AIS Parse): Waiting for BOOTME... (power on or reset target now)
    (AIS Parse): BOOTME received!
    (AIS Parse): Performing Start-Word Sync...
    (AIS Parse): Performing Ping Opcode Sync...
    (AIS Parse): Processing command 0: 0x58535920.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Secure key loading, entering secure mode.
    (AIS Parse): Processing command 1: 0x58535923.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Setting boot exit mode...
    (AIS Parse): Set exit mode to 0x00000000.
    (AIS Parse): Processing command 2: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 3: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 4: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 5: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 6: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 7: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 8: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 9: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 10: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 11: 0x58535921.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Loading encoded section...

    还有以前用 AISgen for D800K008生成AIS bin文件，可以在界面上设置PLL0等参数，以前的cfg文件如下：

    Boot Mode=NAND Flash
    Boot Speed=0
    Flash Width=0
    Flash Timing=3ffffffc
    Configure Peripheral=False
    Configure PLL0=True
    Configure SDRAM=False
    Configure PLL1=False
    Configure DDR2=False
    Configure LPSC=False
    Configure Pinmux=False
    Enable CRC=False
    Specify Entrypoint=False
    Enable Sequential Read=False
    Use 4.5 Clock Divider=False
    Use DDR2 Direct Clock=False
    Use mDDR=True
    ROM ID=3
    Device Type=1
    Input Clock Speed=24
    Clock Type=0
    PLL0 Pre Divider=1
    PLL0 Multiplier=25
    PLL0 Post Divider=2
    PLL0 Div1=1
    PLL0 Div3=3
    PLL0 Div7=6
    PLL1 Multiplier=20
    PLL1 Post Divider=2
    PLL1 Div1=1
    PLL1 Div2=2
    PLL1 Div3=3
    Entrypoint=0
    SDRAM SDBCR=0
    SDRAM SDTMR=0
    SDRAM SDRSRPDEXIT=0
    SDRAM SDRCR=0
    DDR2 PHY=0
    DDR2 SDCR=0
    DDR2 SDCR2=0
    DDR2 SDTIMR=0
    DDR2 SDTIMR2=0
    DDR2 SDRCR=0
    LPSC0 Enable=
    LPSC0 Disable=
    LPSC0 SyncRst=
    LPSC1 Enable=
    LPSC1 Disable=
    LPSC1 SyncRst=
    Pinmux=

    现在加密版SecureHexAIS_OMAP-L138只能手动写这些参数，并且值也不一样，有工具可将这样的配置转换成加密版的ini文件吗，用

  • 0 回复 dsp china
    Intellectual 260 points

    用secure uart boot host引导，提示如下：

    (AIS Parse): Read magic word 0x41504954.
    (AIS Parse): Waiting for BOOTME... (power on or reset target now)
    (AIS Parse): BOOTME received!
    (AIS Parse): Performing Start-Word Sync...
    (AIS Parse): Performing Ping Opcode Sync...
    (AIS Parse): Processing command 0: 0x58535920.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Secure key loading, entering secure mode.
    (AIS Parse): Processing command 1: 0x58535923.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Setting boot exit mode...
    (AIS Parse): Set exit mode to 0x00000000.
    (AIS Parse): Processing command 2: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 3: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 4: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 5: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 6: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 7: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 8: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 9: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 10: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 11: 0x58535921.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Loading encoded section...
    (AIS Parse): Loaded 124512-Byte section to address 0x11800000.
    (AIS Parse): Processing command 12: 0x58535921.
    (AIS Parse): Performing Opcode Sync...
    (Serial Port): Read error: 操作已超时。
    (AIS Parse): I/O Error in read!
    (Serial Port): Read error: 操作已超时。
    (AIS Parse): I/O Error in read!
    (Serial Port): Read error: 操作已超时。
    (AIS Parse): I/O Error in read!
    (Serial Port): Read error: 操作已超时。
    (AIS Parse): I/O Error in read!
    (Serial Port): Read error: 操作已超时。
    (AIS Parse): I/O Error in read!
    (Serial Port): Read error: 操作已超时。
    (AIS Parse): I/O Error in read!
    (Serial Port): Read error: 操作已超时。
    (AIS Parse): I/O Error in read!
    (Serial Port): Read error: 操作已超时。
    (AIS Parse): I/O Error in read!
    (Serial Port): Read error: 操作已超时。
    (AIS Parse): I/O Error in read!
    (Serial Port): Read error: 操作已超时。
    (AIS Parse): I/O Error in read!
    (Serial Port): Read error: 操作已超时。
    (AIS Parse): I/O Error in read!
    (AIS Parse): Opcode Sync failed after 11 consecutive I/O failures.
    (AIS Parse): Boot aborted.
    (Serial Port): Closing COM15.

    用的是24M晶振，ini file如下：

    ; General settings that can be overwritten in the host code
    ; that calls the AISGen library.
    [General]
    ; Can be 8 or 16 - used in emifa
    busWidth=8            

    ; SPIMASTER,I2CMASTER,EMIFA,NAND,EMAC,UART,PCI,HPI,USB,MMC_SD,VLYNQ,RAW
    BootMode=NONE

    ; 8,16,24 - used for SPI,I2C
    ;AddrWidth=8          

    ; NO_CRC,SECTION_CRC,SINGLE_CRC
    crcCheckType=NO_CRC

    ; TRUE/ON or FALSE/OFF
    seqReadEn=ON

    ; Specify the symbol name for the boot finalize function
    ;FinalFxnSymbolName=none


    ; Security settings (keys, options, list of sections to encrypt, etc.)
    [Security]

    ; Security Type: GENERIC, CUSTOM, NONE
    securityType=GENERIC

    ; Boot Exit Type: NONSECURE, SECUREWITHSK, SECURENOSK
    ; NONSECURE = Device switches from secure type to non-secure type, jumping to loaded code
    ;             (no secure kernel since no longer secure device).
    ; SECUREWITHSK = Device remains as secure type, secure kernel is loaded, allowing run-time
    ;                security context switching.
    bootExitType = NONSECURE

    ; Option to include in the generated key header the flag to force the JTAG off
    ;genericJTAGForceOff=FALSE

    ; Encrypt section list (ALL or comma-separated list of section names)
    encryptSections=ALL

    ; CEK used for AES encryption of data - must be string of 32 hexadecimal characters
    encryptionKey=4A7E1F56AE545D487C452388A65B0C05

    ; Debug key
    ;keyEncryptionKey=0B94A91D33E597097F6C426F8F016872

    ; SHA Algorithm Selection
    ;genericSHASelection = SHA256

    ; Binary file containing secure key header for generic device
    ;genKeyHeaderFileName=key_hdr_sha256_enc.bin



    ; This section allows setting the PLL0 system clock with a  
    ; specified multiplier and divider as shown. The clock source
    ; can also be chosen for internal or external.
    ;           |------24|------16|-------8|-------0|
    ; PLL0CFG0: | CLKMODE| PLLM   | PREDIV | POSTDIV|
    ; PLL0CFG1: | RSVD   | PLLDIV1| PLLDIV3| PLLDIV7|
    ;[PLL0CONFIG]
    ;PLL0CFG0 = 0x00130001
    ;PLL0CFG1 = 0x00000104


    ;PLL0 Multiplier=25  PLL0 Pre Divider=1 PLL0 Post Divider=2    
    ;PLL0 Div1=1 PLL0 Div3=3 PLL0 Div7=6
    PLL0CFG0 = 0x00180001
    PLL0CFG1 = 0x00000205

    ; This section allows setting up the PLL1. Usually this will
    ; take place as part of the EMIF3a DDR setup. The format of
    ; the input args is as follows:
    ;           |------24|------16|-------8|-------0|
    ; PLL1CFG0: |    PLLM| POSTDIV| PLLDIV1| PLLDIV2|
    ; PLL1CFG1: |           RSVD           | PLLDIV3|
    ;[PLL1CONFIG]
    ;PLL1CFG0 = 0x00000000
    ;PLL1CFG1 = 0x00000000


    ;PLL1 Multiplier=20 PLL1 Post Divider=2
    ;PLL1 Div1=1  PLL1 Div2=2 PLL1 Div3=3
    PLL1CFG0 = 0x13010001
    PLL1CFG1 = 0x00000002

    ; This section lets us configure the peripheral interface
    ; of the current booting peripheral (I2C, SPI, or UART).
    ; Use with caution. The format of the PERIPHCLKCFG field
    ; is as follows:
    ; SPI:        |------24|------16|-------8|-------0|
    ;             |           RSVD           |PRESCALE|
    ;
    ; I2C:        |------24|------16|-------8|-------0|
    ;             |  RSVD  |PRESCALE|  CLKL  |  CLKH  |
    ;
    ; UART:       |------24|------16|-------8|-------0|
    ;             | RSVD   |  OSR   |  DLH   |  DLL   |
    ;[PERIPHCLKCFG]
    ;PERIPHCLKCFG = 0x00000000


    ; This section allow setting the MPU1 or MPU2. If the
    ; rangenum is out of the allowed range then all the ranges
    ; (including the fixed range) take the start, end, and
    ; protection values.
    ;            |------24|------16|----------8|----------0|
    ; MPUSELECT: |      RSVD       |   mpuNum  | rangeNum  |
    ; STARTADDR: |              startAddr                  |
    ; ENDADDR:   |               endAddr                   |
    ; MPPAVALUE: |              mppaValue                  |
    [MPUCONFIG]
    MPUSELECT = 0x000001FF
    STARTADDR = 0x00000000
    ENDADDR   = 0xFFFFFFFF
    MPPAVALUE = 0xFFFFFFFF



    ; This section can be used to configure the PLL1 and the EMIF3a registers
    ; for starting the DDR2 interface.
    ; See PLL1CONFIG section for the format of the PLL1CFG fields.
    ;            |------24|------16|-------8|-------0|
    ; PLL1CFG0:  |              PLL1CFG              |
    ; PLL1CFG1:  |              PLL1CFG              |
    ; DDRPHYC1R: |             DDRPHYC1R             |
    ; SDCR:      |              SDCR                 |
    ; SDTIMR:    |              SDTIMR               |
    ; SDTIMR2:   |              SDTIMR2              |
    ; SDRCR:     |              SDRCR                |
    ; CLK2XSRC:  |             CLK2XSRC              |
    [EMIF3DDR]
    PLL1CFG0 = 0x15010001
    PLL1CFG1 = 0x00000002
    DDRPHYC1R = 0x000000C4
    SDCR = 0x0A034622
    SDTIMR = 0x184929C8
    SDTIMR2 = 0xB80FC700
    SDRCR = 0x00000406
    CLK2XSRC = 0x00000000

    ; This section allow setting the MPU1 or MPU2. If the
    ; rangenum is out of the allowed range then all the ranges
    ; (including the fixed range) take the start, end, and
    ; protection values.
    ;            |------24|------16|----------8|----------0|
    ; MPUSELECT: |      RSVD       |   mpuNum  | rangeNum  |
    ; STARTADDR: |              startAddr                  |
    ; ENDADDR:   |               endAddr                   |
    ; MPPAVALUE: |              mppaValue                  |
    ;
    ; This MPU control must happen after the DDR init or else the
    ; MPU control has no effect
    [MPUCONFIG]
    MPUSELECT = 0x000002FF
    STARTADDR = 0x00000000
    ENDADDR   = 0xFFFFFFFF
    MPPAVALUE = 0xFFFFFFFF

    ; This section can be used to configure the EMIFA to use
    ; CS0 as an SDRAM interface.  The fields required to do this
    ; are given below.
    ;                     |------24|------16|-------8|-------0|
    ; SDBCR:              |               SDBCR               |
    ; SDTIMR:             |               SDTIMR              |
    ; SDRSRPDEXIT:        |             SDRSRPDEXIT           |
    ; SDRCR:              |               SDRCR               |
    ; DIV4p5_CLK_ENABLE:  |         DIV4p5_CLK_ENABLE         |
    ;[EMIF25SDRAM]
    ;SDBCR = 0x00004421
    ;SDTIMR = 0x42215810
    ;SDRSRPDEXIT = 0x00000009
    ;SDRCR = 0x00000410
    ;DIV4p5_CLK_ENABLE = 0x00000001

    ; This section can be used to configure the async chip selects
    ; of the EMIFA (CS2-CS5).  The fields required to do this
    ; are given below.
    ;           |------24|------16|-------8|-------0|
    ; A1CR:     |                A1CR               |
    ; A2CR:     |                A2CR               |
    ; A3CR:     |                A3CR               |
    ; A4CR:     |                A4CR               |
    ; NANDFCR:  |              NANDFCR              |
    ;[EMIF25ASYNC]
    ;A1CR = 0x00000000
    ;A2CR = 0x00000000
    ;A3CR = 0x00000000
    ;A4CR = 0x00000000
    ;NANDFCR = 0x00000000

    ; This section should be used in place of PLL0CONFIG when
    ; the I2C, SPI, or UART modes are being used.  This ensures that
    ; the system PLL and the peripheral's clocks are changed together.
    ; See PLL0CONFIG section for the format of the PLL0CFG fields.
    ; See PERIPHCLKCFG section for the format of the CLKCFG field.
    ;               |------24|------16|-------8|-------0|
    ; PLL0CFG0:     |              PLL0CFG              |
    ; PLL0CFG1:     |              PLL0CFG              |
    ; PERIPHCLKCFG: |              CLKCFG               |
    ;[PLLANDCLOCKCONFIG]
    ;PLL0CFG0 = 0x00000000
    ;PLL0CFG1 = 0x00000000
    ;PERIPHCLKCFG = 0x00000000

    ; This section should be used to setup the power state of modules
    ; of the two PSCs.  This section can be included multiple times to
    ; allow the configuration of any or all of the device modules.
    ;           |------24|------16|-------8|-------0|
    ; LPSCCFG:  | PSCNUM | MODULE |   PD   | STATE  |
    ;[PSCCONFIG]
    ;LPSCCFG = 0x01030003

    ; This section allows setting of a single PINMUX register.
    ; This section can be included multiple times to allow setting
    ; as many PINMUX registers as needed.
    ;         |------24|------16|-------8|-------0|
    ; REGNUM: |              regNum               |
    ; MASK:   |               mask                |
    ; VALUE:  |              value                |
    ;[PINMUX]
    ;REGNUM = 5
    ;MASK = 0x00FF0000
    ;VALUE = 0x00880000

    ; No Params required - simply include this section for the fast boot function to be called
    ;[FASTBOOT]

    ; This section allows configuration of one the systme IOPUs.
    ; The iopuNum field must be valid (0-5) and then mppaStart
    ; and mppaend fields allow setting a range of mppa MMRs to the
    ; same supplied mppa value.
    ; IOPUSELECT: |  RSVD  | iopuNum| mppaStart |  mppaEnd  |
    ; MPPAVALUE:  |              mppaValue                  |
    [IOPUCONFIG]
    IOPUSELECT = 0x000000FF
    MPPAVALUE  = 0xFFFFFFFF

    [IOPUCONFIG]
    IOPUSELECT = 0x000100FF
    MPPAVALUE  = 0xFFFFFFFF

    [IOPUCONFIG]
    IOPUSELECT = 0x000200FF
    MPPAVALUE  = 0xFFFFFFFF

    [IOPUCONFIG]
    IOPUSELECT = 0x000300FF
    MPPAVALUE  = 0xFFFFFFFF

    [IOPUCONFIG]
    IOPUSELECT = 0x000600FF
    MPPAVALUE  = 0xFFFFFFFF

    ; This section allow setting the MPU1 or MPU2. If the
    ; rangenum is out of the allowed range then all the ranges
    ; (including the fixed range) take the start, end, and
    ; protection values.
    ;            |------24|------16|----------8|----------0|
    ; MPUSELECT: |      RSVD       |   mpuNum  | rangeNum  |
    ; STARTADDR: |              startAddr                  |
    ; ENDADDR:   |               endAddr                   |
    ; MPPAVALUE: |              mppaValue                  |
    ;[MPUCONFIG]
    ;MPUSELECT = 0x000001FF
    ;STARTADDR = 0x00000000
    ;ENDADDR   = 0x00000000
    ;MPPAVALUE = 0xFFFFFFFF

    ; This function allows the user to selectively open up the
    ; the debug TAPs of the device.  Since the function is not
    ; executed until the signature is checked, it does not
    ; pose a security issue.
    ;          |------24|------16|----------8|----------0|
    ; TAPSCFG: |      RSVD       |       tapscfg         |
    [TAPSCONFIG]
    TAPSCFG = 0x0000FFFF

    帮忙看下，ini 文件是否有错，什么会传输出错，谢谢


  • 0 回复 dsp china
    Intellectual 260 points

    现在同一块电路板一个用c6748非加密板，一个用加密板，非加密板可正常引导，加密板却引导不了，都是同一个.out文件，只是非加密版用AISgen for d800k008 生成bin文件，引导用UART Boot host，一个用SecureHexAIS_OMAP-L138生成bin文件，引导用GenericSecureUartHost，为什么？下面是非加密版配置文件和引导结果：

    Boot Mode=UART0
    Boot Speed=115200
    Flash Width=0
    Flash Timing=3ffffffc
    Configure Peripheral=True
    Configure PLL0=True
    Configure SDRAM=False
    Configure PLL1=False
    Configure DDR2=False
    Configure LPSC=False
    Configure Pinmux=False
    Enable CRC=False
    Specify Entrypoint=False
    Enable Sequential Read=False
    Use 4.5 Clock Divider=False
    Use DDR2 Direct Clock=False
    Use mDDR=True
    ROM ID=3
    Device Type=1
    Input Clock Speed=24
    Clock Type=0
    PLL0 Pre Divider=1
    PLL0 Multiplier=25
    PLL0 Post Divider=2
    PLL0 Div1=1
    PLL0 Div3=3
    PLL0 Div7=6
    PLL1 Multiplier=20
    PLL1 Post Divider=2
    PLL1 Div1=1
    PLL1 Div2=2
    PLL1 Div3=3
    Entrypoint=0
    SDRAM SDBCR=0
    SDRAM SDTMR=0
    SDRAM SDRSRPDEXIT=0
    SDRAM SDRCR=0
    DDR2 PHY=0
    DDR2 SDCR=0
    DDR2 SDCR2=0
    DDR2 SDTIMR=0
    DDR2 SDTIMR2=0
    DDR2 SDRCR=0
    LPSC0 Enable=
    LPSC0 Disable=
    LPSC0 SyncRst=
    LPSC1 Enable=
    LPSC1 Disable=
    LPSC1 SyncRst=
    Pinmux=

    (AIS Parse): Waiting for BOOTME... (power on or reset target now)
    (AIS Parse): BOOTME received!
    (AIS Parse): Performing Start-Word Sync...
    (AIS Parse): Performing Ping Opcode Sync...
    (AIS Parse): Processing command 0: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Processing command 1: 0x58535901.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Loading section...
    (AIS Parse): Loaded 124512-Byte section to address 0x11800000.
    (AIS Parse): Processing command 2: 0x58535901.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Loading section...
    (AIS Parse): Loaded 1760-Byte section to address 0x1183D6F0.
    (AIS Parse): Processing command 3: 0x58535901.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Loading section...
    (AIS Parse): Loaded 388-Byte section to address 0x1183E1D0.
    (AIS Parse): Processing command 4: 0x58535901.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Loading section...
    (AIS Parse): Loaded 512-Byte section to address 0x1183E400.
    (AIS Parse): Processing command 5: 0x58535901.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Loading section...
    (AIS Parse): Loaded 48772-Byte section to address 0x80000000.
    (AIS Parse): Processing command 6: 0x58535901.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Loading section...
    (AIS Parse): Loaded 128-Byte section to address 0x80010000.
    (AIS Parse): Processing command 7: 0x58535906.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Performing jump and close...
    (AIS Parse): AIS complete. Jump to address 0x80010000.
    (AIS Parse): Waiting for DONE...
    (AIS Parse): Boot completed successfully.
    (Serial Port): Closing COM15.

    加密版：

    ; General settings that can be overwritten in the host code
    ; that calls the AISGen library.
    [General]
    ; Can be 8 or 16 - used in emifa
    busWidth=16            

    ; SPIMASTER,I2CMASTER,EMIFA,NAND,EMAC,UART,PCI,HPI,USB,MMC_SD,VLYNQ,RAW
    BootMode=UART

    ; 8,16,24 - used for SPI,I2C
    ;AddrWidth=8          

    ; NO_CRC,SECTION_CRC,SINGLE_CRC
    crcCheckType=NO_CRC

    ; TRUE/ON or FALSE/OFF
    seqReadEn=ON

    ; Specify the symbol name for the boot finalize function
    ;FinalFxnSymbolName=none


    ; Security settings (keys, options, list of sections to encrypt, etc.)
    [Security]

    ; Security Type: GENERIC, CUSTOM, NONE
    securityType=GENERIC

    ; Boot Exit Type: NONSECURE, SECUREWITHSK, SECURENOSK
    ; NONSECURE = Device switches from secure type to non-secure type, jumping to loaded code
    ;             (no secure kernel since no longer secure device).
    ; SECUREWITHSK = Device remains as secure type, secure kernel is loaded, allowing run-time
    ;                security context switching.
    bootExitType = NONSECURE

    ; Option to include in the generated key header the flag to force the JTAG off
    ;genericJTAGForceOff=FALSE

    ; Encrypt section list (ALL or comma-separated list of section names)
    ;encryptSections=ALL

    ; CEK used for AES encryption of data - must be string of 32 hexadecimal characters
    encryptionKey=4A7E1F56AE545D487C452388A65B0C05

    ; Debug key
    ;keyEncryptionKey=0B94A91D33E597097F6C426F8F016872

    ; SHA Algorithm Selection
    ;genericSHASelection = SHA256

    ; Binary file containing secure key header for generic device
    ;genKeyHeaderFileName=key_hdr_sha256_enc.bin



    ; This section allows setting the PLL0 system clock with a  
    ; specified multiplier and divider as shown. The clock source
    ; can also be chosen for internal or external.
    ;           |------24|------16|-------8|-------0|
    ; PLL0CFG0: | CLKMODE| PLLM   | PREDIV | POSTDIV|
    ; PLL0CFG1: | RSVD   | PLLDIV1| PLLDIV3| PLLDIV7|
    ;[PLL0CONFIG]
    ;PLL0CFG0 = 0x00130001
    ;PLL0CFG1 = 0x00000104

    ; This section allows setting up the PLL1. Usually this will
    ; take place as part of the EMIF3a DDR setup. The format of
    ; the input args is as follows:
    ;           |------24|------16|-------8|-------0|
    ; PLL1CFG0: |    PLLM| POSTDIV| PLLDIV1| PLLDIV2|
    ; PLL1CFG1: |           RSVD           | PLLDIV3|
    ;[PLL1CONFIG]
    ;PLL1CFG0 = 0x00000000
    ;PLL1CFG1 = 0x00000000

    ; This section lets us configure the peripheral interface
    ; of the current booting peripheral (I2C, SPI, or UART).
    ; Use with caution. The format of the PERIPHCLKCFG field
    ; is as follows:
    ; SPI:        |------24|------16|-------8|-------0|
    ;             |           RSVD           |PRESCALE|
    ;
    ; I2C:        |------24|------16|-------8|-------0|
    ;             |  RSVD  |PRESCALE|  CLKL  |  CLKH  |
    ;
    ; UART:       |------24|------16|-------8|-------0|
    ;             | RSVD   |  OSR   |  DLH   |  DLL   |
    ;[PERIPHCLKCFG]
    ;PERIPHCLKCFG = 0x00000000


    ; This section allow setting the MPU1 or MPU2. If the
    ; rangenum is out of the allowed range then all the ranges
    ; (including the fixed range) take the start, end, and
    ; protection values.
    ;            |------24|------16|----------8|----------0|
    ; MPUSELECT: |      RSVD       |   mpuNum  | rangeNum  |
    ; STARTADDR: |              startAddr                  |
    ; ENDADDR:   |               endAddr                   |
    ; MPPAVALUE: |              mppaValue                  |
    ;[MPUCONFIG]
    MPUSELECT = 0x000001FF
    STARTADDR = 0x00000000
    ENDADDR   = 0xFFFFFFFF
    MPPAVALUE = 0xFFFFFFFF



    ; This section can be used to configure the PLL1 and the EMIF3a registers
    ; for starting the DDR2 interface.
    ; See PLL1CONFIG section for the format of the PLL1CFG fields.
    ;            |------24|------16|-------8|-------0|
    ; PLL1CFG0:  |              PLL1CFG              |
    ; PLL1CFG1:  |              PLL1CFG              |
    ; DDRPHYC1R: |             DDRPHYC1R             |
    ; SDCR:      |              SDCR                 |
    ; SDTIMR:    |              SDTIMR               |
    ; SDTIMR2:   |              SDTIMR2              |
    ; SDRCR:     |              SDRCR                |
    ; CLK2XSRC:  |             CLK2XSRC              |
    [EMIF3DDR]
    PLL1CFG0 = 0x15010001
    PLL1CFG1 = 0x00000002
    DDRPHYC1R = 0x000000C4
    SDCR = 0x0A034622
    SDTIMR = 0x184929C8
    SDTIMR2 = 0xB80FC700
    SDRCR = 0x00000406
    CLK2XSRC = 0x00000000

    ; This section allow setting the MPU1 or MPU2. If the
    ; rangenum is out of the allowed range then all the ranges
    ; (including the fixed range) take the start, end, and
    ; protection values.
    ;            |------24|------16|----------8|----------0|
    ; MPUSELECT: |      RSVD       |   mpuNum  | rangeNum  |
    ; STARTADDR: |              startAddr                  |
    ; ENDADDR:   |               endAddr                   |
    ; MPPAVALUE: |              mppaValue                  |
    ;
    ; This MPU control must happen after the DDR init or else the
    ; MPU control has no effect
    [MPUCONFIG]
    MPUSELECT = 0x000002FF
    STARTADDR = 0x00000000
    ENDADDR   = 0xFFFFFFFF
    MPPAVALUE = 0xFFFFFFFF

    ; This section can be used to configure the EMIFA to use
    ; CS0 as an SDRAM interface.  The fields required to do this
    ; are given below.
    ;                     |------24|------16|-------8|-------0|
    ; SDBCR:              |               SDBCR               |
    ; SDTIMR:             |               SDTIMR              |
    ; SDRSRPDEXIT:        |             SDRSRPDEXIT           |
    ; SDRCR:              |               SDRCR               |
    ; DIV4p5_CLK_ENABLE:  |         DIV4p5_CLK_ENABLE         |
    ;[EMIF25SDRAM]
    ;SDBCR = 0x00004421
    ;SDTIMR = 0x42215810
    ;SDRSRPDEXIT = 0x00000009
    ;SDRCR = 0x00000410
    ;DIV4p5_CLK_ENABLE = 0x00000001

    ; This section can be used to configure the async chip selects
    ; of the EMIFA (CS2-CS5).  The fields required to do this
    ; are given below.
    ;           |------24|------16|-------8|-------0|
    ; A1CR:     |                A1CR               |
    ; A2CR:     |                A2CR               |
    ; A3CR:     |                A3CR               |
    ; A4CR:     |                A4CR               |
    ; NANDFCR:  |              NANDFCR              |
    ;[EMIF25ASYNC]
    ;A1CR = 0x00000000
    ;A2CR = 0x00000000
    ;A3CR = 0x00000000
    ;A4CR = 0x00000000
    ;NANDFCR = 0x00000000

    ; This section should be used in place of PLL0CONFIG when
    ; the I2C, SPI, or UART modes are being used.  This ensures that
    ; the system PLL and the peripheral's clocks are changed together.
    ; See PLL0CONFIG section for the format of the PLL0CFG fields.
    ; See PERIPHCLKCFG section for the format of the CLKCFG field.
    ;               |------24|------16|-------8|-------0|
    ; PLL0CFG0:     |              PLL0CFG              |
    ; PLL0CFG1:     |              PLL0CFG              |
    ; PERIPHCLKCFG: |              CLKCFG               |
    [PLLANDCLOCKCONFIG]
    PLL0CFG0 = 0x00180001
    PLL0CFG1 = 0x00000205
    PERIPHCLKCFG = 0x00000051

    ; This section should be used to setup the power state of modules
    ; of the two PSCs.  This section can be included multiple times to
    ; allow the configuration of any or all of the device modules.
    ;           |------24|------16|-------8|-------0|
    ; LPSCCFG:  | PSCNUM | MODULE |   PD   | STATE  |
    ;[PSCCONFIG]
    ;LPSCCFG = 0x01030003

    ; This section allows setting of a single PINMUX register.
    ; This section can be included multiple times to allow setting
    ; as many PINMUX registers as needed.
    ;         |------24|------16|-------8|-------0|
    ; REGNUM: |              regNum               |
    ; MASK:   |               mask                |
    ; VALUE:  |              value                |
    ;[PINMUX]
    ;REGNUM = 5
    ;MASK = 0x00FF0000
    ;VALUE = 0x00880000

    ; No Params required - simply include this section for the fast boot function to be called
    ;[FASTBOOT]

    ; This section allows configuration of one the systme IOPUs.
    ; The iopuNum field must be valid (0-5) and then mppaStart
    ; and mppaend fields allow setting a range of mppa MMRs to the
    ; same supplied mppa value.
    ; IOPUSELECT: |  RSVD  | iopuNum| mppaStart |  mppaEnd  |
    ; MPPAVALUE:  |              mppaValue                  |
    [IOPUCONFIG]
    IOPUSELECT = 0x000000FF
    MPPAVALUE  = 0xFFFFFFFF

    [IOPUCONFIG]
    IOPUSELECT = 0x000100FF
    MPPAVALUE  = 0xFFFFFFFF

    [IOPUCONFIG]
    IOPUSELECT = 0x000200FF
    MPPAVALUE  = 0xFFFFFFFF

    [IOPUCONFIG]
    IOPUSELECT = 0x000300FF
    MPPAVALUE  = 0xFFFFFFFF

    [IOPUCONFIG]
    IOPUSELECT = 0x000600FF
    MPPAVALUE  = 0xFFFFFFFF

    ; This section allow setting the MPU1 or MPU2. If the
    ; rangenum is out of the allowed range then all the ranges
    ; (including the fixed range) take the start, end, and
    ; protection values.
    ;            |------24|------16|----------8|----------0|
    ; MPUSELECT: |      RSVD       |   mpuNum  | rangeNum  |
    ; STARTADDR: |              startAddr                  |
    ; ENDADDR:   |               endAddr                   |
    ; MPPAVALUE: |              mppaValue                  |
    ;[MPUCONFIG]
    ;MPUSELECT = 0x000001FF
    ;STARTADDR = 0x00000000
    ;ENDADDR   = 0x00000000
    ;MPPAVALUE = 0xFFFFFFFF

    ; This function allows the user to selectively open up the
    ; the debug TAPs of the device.  Since the function is not
    ; executed until the signature is checked, it does not
    ; pose a security issue.
    ;          |------24|------16|----------8|----------0|
    ; TAPSCFG: |      RSVD       |       tapscfg         |
    [TAPSCONFIG]
    TAPSCFG = 0x0000FFFF



    (AIS Parse): Read magic word 0x41504954.
    (AIS Parse): Waiting for BOOTME... (power on or reset target now)
    (AIS Parse): BOOTME received!
    (AIS Parse): Performing Start-Word Sync...
    (AIS Parse): Performing Ping Opcode Sync...
    (AIS Parse): Processing command 0: 0x58535920.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Secure key loading, entering secure mode.
    (AIS Parse): Processing command 1: 0x58535923.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Setting boot exit mode...
    (AIS Parse): Set exit mode to 0x00000000.
    (AIS Parse): Processing command 2: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 3: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 4: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 5: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 6: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 7: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 8: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 9: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 10: 0x5853590D.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Executing function...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): Processing command 11: 0x58535901.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Loading section...
    (AIS Parse): Loaded 124512-Byte section to address 0x11800000.
    (AIS Parse): Processing command 12: 0x58535901.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Loading section...
    (AIS Parse): Loaded 1760-Byte section to address 0x1183D6F0.
    (AIS Parse): Processing command 13: 0x58535901.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Loading section...
    (AIS Parse): Loaded 388-Byte section to address 0x1183E1D0.
    (AIS Parse): Processing command 14: 0x58535901.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Loading section...
    (AIS Parse): Loaded 512-Byte section to address 0x1183E400.
    (AIS Parse): Processing command 15: 0x58535901.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Loading section...
    (AIS Parse): Loaded 48772-Byte section to address 0x80000000.
    (AIS Parse): Processing command 16: 0x58535901.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Loading section...
    (AIS Parse): Loaded 128-Byte section to address 0x80010000.
    (AIS Parse): Processing command 17: 0x58535906.
    (AIS Parse): Performing Opcode Sync...
    (AIS Parse): Performing jump and close...
    (AIS Parse): Secure mode; sending signature.
    (AIS Parse): AIS complete. Jump to address 0x80010000.
    (AIS Parse): Waiting for DONE...
    一直是Waiting for DONE...，是加密版的ini文件有问题吗

  • 0 回复 dsp china
    TI__Guru 64206 points

    下面这个选项在ini里没找开，不知道跟这个有没有关系

    ; SHA Algorithm Selection
    genericSHASelection = SHA256