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DM6437 SYSTEM module VPSS_CLK_CTRL的PCLKINV=0时normal指的是上升沿吗？
我是要在下降沿时采数据，是要设置PCLKINV=1吗？
hhh，
从下面的文档描述看，是的。
PCLK can be inverted for negative edge support, selectable by the PCLKINV bit in VPSS_CLKCTL.
请问这个VPSS_DLK_CTRL寄存器的修改是在哪个文件里修改的？要是方便的话能否提供下路径
