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12.1 Programming the PCI Configuration Space Registers
Configuration space registers can be programmed both from the external PCI host and DSP. Normally,
the PCI host programs a part of configuration space registers and DSP programs the remaining part.
A PCI host can control modes and options in PCI by programming the configuration space registers. For
example, the PCI host can program the Command/Status register (PCICSR) to enable PCI bus master
capability for the DSP and to enable the memory access to DSP. It can program the Base Address
Registers (PCIBAR0 to PCIBAR5) to map the DSP memory regions into PCI address space.
The PCI host can access the configuration space registers by performing a TYPE 0 access in the PCI
bus.
The DSP needs to program a set of registers in the configuration space before the PCI host system
software scans the PCI, as part of enumerating the PCI devices. For example, it needs to program Vendor
ID/Device ID (PCIVENDEV) and Class Code/Revision ID registers (PCICLREV) so that the PCI host
system software can identify the device and load the respective host driver if required. This can be done
automatically using the I2C EEPROM initialization method, as described in Section 12.4.
The DSP cannot access the configuration space registers directly. To facilitate access to the configuration
space registers, mirror registers are supported. Updating the mirror registers updates the corresponding
configuration space registers.

Base Address n Mirror Register (PCIBARnMIR)