When using the TDA4VH-Q processor, we found that if the signal source outputs MIPI CSI-2 data at 2.2 Gbps/lane in continuous clock mode, the processor experiences reception abnormalities. However, if we first switch the signal source to operate at 800 Mbps/lane in non-continuous clock mode for a period of time, and then switch back to the original 2 Gbps continuous mode, the reception returns to normal. What might be the reason for this abnormality? Why is it necessary to first switch to the low-speed non-continuous mode?