TDA4VH-Q1: TDA4VH-Q MIPI CSI-2 Failure at 2.2Gbps Continuous Mode, Requires 800Mbps Non-Continuous Wake-up.

Part Number: TDA4VH-Q1


When using the TDA4VH-Q processor, we found that if the signal source outputs MIPI CSI-2 data at 2.2 Gbps/lane in continuous clock mode, the processor experiences reception abnormalities. However, if we first switch the signal source to operate at 800 Mbps/lane in non-continuous clock mode for a period of time, and then switch back to the original 2 Gbps continuous mode, the reception returns to normal. What might be the reason for this abnormality? Why is it necessary to first switch to the low-speed non-continuous mode?

  • Hello!

    We have received your case and will take some time to look into it.

    Thank you for your patience.

  • Its not necessary to switch to lower speed mode and then switch back to normal speed mode in CSIRX. When you say reception has abnormalities, can you explain what abnormalities are you observing? At 2.2Gbps lane speed, transmitter must send skew calibration sequence, can you please check and confirm that this is being sent from the transmitter? Apart from this, please check and confirm that you are setting correct lane speed/band speed in the CSIRX..

  • My SDK version is ti-processor-sdk-rtos-j784s4-evm-10_01_00_04.

    Regarding the processing of the skew calibration sequence signal, is it completed by hardware or software on the TDA4 processor? Does it require any software-level configuration or code modification to adapt for processing and receiving this signal? Where can I find information about the specific code modules and register lists?

    If the image output abnormality at 2.2Gbps/4lane is indeed caused by the skew calibration sequence signal, will my original program be able to output images normally when the rate is reduced below 1.5Gbps/4lane?