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请问TMS320DM648 port口用作display模式时，其发送的数据比如VP2_[2:9]，其边沿与VP2_CLK0和VP2_CLK1的关系是怎么样的？ 当后端比如SAA7105使用VP2_CLK0或VP2_CLK1是否存在问题？
Chen Yang,
从手册看到的时序可以看出是时钟下降沿发出数据：
