Part Number: SK-AM64B
Hi TI team,
We are working on an AM64x SK-AM64B based design and trying to split CPSW3G usage between Linux A53 and an R5 core.
Target architecture:
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Linux A53 owns CPSW port1 / eth0 for normal TCP/IP.
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R5 owns CPSW port2 for EtherCAT.
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Since AM64x CPSW3G appears to have a single host RX DMA channel, Linux initializes and owns the shared RX channel.
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R5 is intended to use a dedicated RX flow, currently flow 19, with RX ring 130 / FDQ ring 130.
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ALE / rxnfc rules on Linux steer port2 / broadcast traffic to thread 3, corresponding to flow 19.
Resource ownership setup:
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Linux host: host_id 12.
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R5 host: host_id 36.
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In rm-cfg.yaml embedded into tiboot3, we tried sharing these resources:
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type 1963, start_resource 16, num_resource 1, host_id 12
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type 1963, start_resource 16, num_resource 1, host_id 36
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type 1964, start_resource 16, num_resource 4, host_id 12
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type 1964, start_resource 19, num_resource 1, host_id 36
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type 1943, start_resource 128, num_resource 4, host_id 12
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type 1943, start_resource 130, num_resource 2, host_id 36
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Linux DTS is trimmed to only tx0 + rx for CPSW:
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dma-names = "tx0", "rx"
Observed behavior:
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Linux CPSW driver probes successfully.
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eth0 exists and works as the Linux-side CPSW netdev.
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eth1 is intentionally absent; port2 is reserved for R5.
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Linux logs show:
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ch_flowid_cnt = 4
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flow-id-base = 16
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port2 ALE policer points to thread 3 / flow 19
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remote flow bind for flow19 / ring130 returns OK
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However, the runtime register readback remains zero:
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rchan16 RFLOW_RNG at 0x4a8100f0 = 0x00000000
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flow19 RFE/RFG/RFH remain 0
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R5 RX ring occupancy remains 0
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R5 EtherCAT RX packet counter remains 0
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This is reproducible after a cold power cycle with the updated tiboot3.
R5 side observations:
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R5 can initialize TX and transmit EtherCAT frames.
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R5 TISCI requests for RX ring, RX flow, and RX channel return NACKs, which we currently treat as expected because Linux owns the shared RX channel.
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R5 reports:
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rx_ready = 1
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rx_flow = 19
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ring_rx = 130
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occ_rx = 0
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rflow_rng = 0x00000000
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rfe = 0x00000000
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Questions:
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Does AM64x SYSFW/RM support sharing the CPSW RX channel resource, type 1963, between A53 host 12 and R5 host 36?
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If yes, what is the correct rm-cfg.yaml / boardcfg representation for primary/secondary ownership on AM64x?
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Is duplicate resasg entry sharing valid for AM64x, or is the primary/secondary sharing model only supported through SysConfig-generated metadata not visible as simple duplicate ranges?
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Can Linux own and initialize the single CPSW RX channel while an R5 core owns a remote RX flow and RX rings?
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For AM64x CPSW3G, is steering traffic from Linux CPSW ALE/rxnfc to an R5-owned RX flow supported, or must all RX flows belong to the Linux host if Linux owns the RX channel?
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Are resource types 1963, 1964, and 1943 the complete set required for this shared RX-channel design, or are additional resources required?
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Is there any TI reference design or SDK example for AM64x where A53 Linux uses CPSW port1 and R5 independently receives CPSW port2 traffic through a dedicated RX flow?
Our main goal is network isolation:
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J5 / port1 remains Linux TCP/IP.
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J6 / port2 is dedicated to R5 EtherCAT.
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Both ports should coexist without Linux owning a netdev for port2.
Could you confirm whether this architecture is supported on AM64x, and if so, what exact RM boardcfg and driver ownership model should be used?
