TDA4VEN-Q1: The level issue of data transmission from FPGA to TDA4VEN via CSI

Part Number: TDA4VEN-Q1

Xilinx's FPGA transmits data to TDA4VEN via CSI. The FPGA is configured as a CSI interface, and its VCCO needs to be set to 1.2V. The VCC voltage of the CSI in TDA4 is 1.8V. Can the CSI interface of FPGA and TDA4 be directly connected?
I understand that the two can be directly connected. Because both chips comply with the MIPI DPHY v1.2 standard. The MIPI LP level defined in this standard is 1.2V.

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