请教各位,我在运行flash的烧写程序的时候resume 按钮成灰色的不能使用
请问大家有没有遇到过?希望有经验的坛友指导一下!运行环境是ccs5.5 tms6747 xds100v1
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谢谢你回复,使用暂停后确实可以再次使用resume。
我有其他的一些问题关于nandflash
1、当通过cs3连接nandflash的时候,以0x62000000开始的地址里面对应的寄存器是什么作用呢? 我在手册上没有找到,只是通过程序感觉0x62000000是数据寄存器?
2、#define NAND_READ_RB ( ( *( volatile Uint32* )( 0x01E00064 ) ) & 1 ) 为什么取0x01E00064指向的数据
以上两个都是在nandflash.h文件夹的,
Look forward to your reply
1,0x62000000起始是CS3的片选空间,这块应该对应着NAND的片上资源
2, ( ( *( volatile Uint32* )( 0x01E00064 ) ) & 1 )把0x1e00064地址的内容取出来,再&1.
yang gao8 说:1、0x62000000不是和nand flash一一映射的吧,访问nandflash都是通过发送命令和地址来进行操作的。我看三星的芯片对应nand flash的片选空间都是定义的一些命令寄存器数据寄存器和地址寄存器。 但是在c6747的手册上没有找到说明
0x62000000只代表对应的CS3,即访问0x62xxxxxx开始的地址空间,则CS3有效,对于NAND,不是地址映射方式访问,所以其它地址与NAND没有关系了。至于访问NAND内部的寄存器,是通过CMD, ALE结合数据线送出相应的命令。而相应的命令是NAND要求的,在它的手册上定义,其实都是标准的,与C6747无关。
yang gao8 说:2、#define NAND_READ_RB ( ( *( volatile Uint32* )( 0x01E00064 ) ) & 1 ) 为什么取0x01E00064指向的数据以上两个都是在nandflash.h文件夹的,
这是哪个软件包下的代码?
/*
* Copyright 2009 by Spectrum Digital Incorporated.
* All rights reserved. Property of Spectrum Digital Incorporated.
*/
/*
* nandflash header file
*
*/
#include "evmomapl137.h"
#ifndef NANDFLASH_
#define NANDFLASH_
#define USE_ECC
/* ------------------------------------------------------------------------ *
* Flash Device - SAMSUNG NAND Flash Memory K9F5608U0B *
* ------------------------------------------------------------------------ */
#define MFG_SAMSUNG 0xEC
#define K9K2G08U0M 0xDA
#define K9K2G08U0M_PAGE_COUNT 64 * 2048
#define DEV_K9F5608U0B 0x75
#define DEV_K9F5608U0B_PAGE_COUNT 32 * 2048 // 32 pages * 2048 blocks
#define DEV_K9F5608Q0B 0x35
#define DEV_K9F5608Q0B_PAGE_COUNT 32 * 2048 // 32 pages * 2048 blocks
#define DEV_K9F2808U0C 0x73
#define DEV_K9F2808U0C_PAGE_COUNT 32 * 1024 // 32 pages * 1024 blocks
#define DEV_K9K1208Q0C 0x36
#define DEV_K9K1208Q0C_PAGE_COUNT 32 * 4096 // 32 pages * 4096 blocks
#define DEV_SMCARD_128 0x79
#define DEV_SMCARD_128_PAGE_COUNT 32 * 8192 // 32 pages * 8192 blocks
#define MFG_STI 0x20
#define DEV_NAND512W3A 0x76
#define DEV_NAND512W3A_PAGE_COUNT 32 * 4096
/* ------------------------------------------------------------------------ *
* Flash Memory Property Definitions *
* ------------------------------------------------------------------------ */
#define NAND_BASE 0x62000000 // SNAND.CS0 BASE
#define NAND_PAGESIZE 2 * 1024
#define NAND_PAGESIZE_POW2 9
#define NAND_SPARESIZE 64//64
#define NAND_SPARESIZE_POW2 4
#define NAND_PAGES_PER_BLOCK 128//64
#define NAND_PAGES_PER_BLOCK_POW2 5
#define NAND_BLOCKSIZE \
NAND_PAGESIZE * NAND_PAGES_PER_BLOCK
#define NAND_BLOCKSIZE_POW2 \
NAND_PAGESIZE_POW2 + NAND_PAGES_PER_BLOCK_POW2
/* ------------------------------------------------------------------------ *
* NAND Flash Command Codes *
* ------------------------------------------------------------------------ */
#define CMD_READ 0x00
#define CMD_READ_CONFIRM 0x30
#define CMD_READ_HALF 0x01
#define CMD_READ_SPARE 0x50
#define CMD_READID 0x90
#define CMD_RESET 0xFF
#define CMD_POINTER_MAIN 0x00
#define CMD_POINTER_MAIN_HALF 0x01
#define CMD_POINTER_SPARE 0x50
#define CMD_PROGRAM 0x80
#define CMD_PROGRAM_CONFIRM 0x10
#define CMD_COPYBACK 0x00
#define CMD_COPYBACK_CONFIRM 0x35
#define CMD_ERASE 0x60
#define CMD_ERASE_CONFIRM 0xD0
#define CMD_STATUS 0x70
#define CMD_CHIP1_STATUS 0xF1
#define CMD_CHIP2_STATUS 0xF2
/* ------------------------------------------------------------------------ *
* NAND Flash Status Register Definitions *
* ------------------------------------------------------------------------ */
#define CMD_STATUS_SUCCESS 0xFFFE
#define CMD_STATUS_ERROR 0x0001
#define CMD_STATUS_BUSY 0xFFBF
#define CMD_STATUS_READY 0x0040
#define CMD_STATUS_WPROTECT 0xFF7F
#define CMD_STATUS_NOWPROTECT 0x0080
/* ------------------------------------------------------------------------ *
* NAND Flash Memory Data Pointer *
* ------------------------------------------------------------------------ */
#define NAND_BASE_PTR *( volatile Uint8* )( NAND_BASE + 0x00 ) #define NAND_CLE_PTR *( volatile Uint8* )( NAND_BASE + 0x10 ) #define NAND_ALE_PTR *( volatile Uint8* )( NAND_BASE + 0x08 )
#define NAND_ASSERT_CE( ) ;
#define NAND_DEASSERT_CE( ) ;
#define NAND_READ_RB ( ( *( volatile Uint32* )( 0x01E00064 ) ) & 1 )
/* ------------------------------------------------------------------------ *
* NAND Flash R/B functions *
* ------------------------------------------------------------------------ */
#define NAND_ERR_NOERROR ( 0 )
#define NAND_ERR_TIMEOUT ( -1 )
/* ------------------------------------------------------------------------ *
* Address decoding *
* _4 = 26 address bits [00-07]--->[09-16]--->[17-24]--->[25-26] *
* _3 = 24 address bits [09-16]--->[17-24]--->[25-26] *
* _2 = 16 address bits [17-24]--->[25-26] *
* _1 = 8 address bits [25-26] *
* ------------------------------------------------------------------------ */
#define NAND_DATA NAND_BASE_PTR #define NAND_CMD( cmd ) NAND_CLE_PTR = cmd;
#define NAND_ADDR_4( addr ) NAND_ALE_PTR = (addr >> 0) & 0xff; NAND_ADDR_3( addr );
#define NAND_ADDR_3( addr ) NAND_ALE_PTR = (addr >> 8) & 0x0f; NAND_ADDR_2( addr );
#define NAND_ADDR_2( addr ) NAND_ALE_PTR = (addr >> 12) & 0xff; NAND_ADDR_1( addr );
#define NAND_ADDR_1( addr ) NAND_ALE_PTR = (addr >> 20) & 0xff; NAND_ADDR_0( addr );
#define NAND_ADDR_0( addr ) NAND_ALE_PTR = (addr >> 28) & 0x03;
/*#define NAND_ADDR_4( addr ) NAND_ALE_PTR = (addr >> 0) & 0xff; NAND_ADDR_3( addr );
#define NAND_ADDR_3( addr ) NAND_ALE_PTR = (addr >> 8) & 0x0f; NAND_ADDR_2( addr );
#define NAND_ADDR_2( addr ) NAND_ALE_PTR = (addr >> 12) & 0xff; NAND_ADDR_1( addr );
#define NAND_ADDR_1( addr ) NAND_ALE_PTR = (addr >> 20) & 0xff; NAND_ADDR_0( addr );
#define NAND_ADDR_0( addr ) NAND_ALE_PTR = (addr >> 28) & 0x01;*/
/* ------------------------------------------------------------------------ *
* Prototypes *
* ------------------------------------------------------------------------ */
Int16 EVMOMAPL137_FLASH_init( );
Uint32 EVMOMAPL137_NANDFLASH_getTotalPages( );
Int16 EVMOMAPL137_NANDFLASH_erase( Uint32 start, Uint32 block_count );
Int16 EVMOMAPL137_NANDFLASH_readPage( Uint32 src, Uint32 dst, Uint32 page_count );
Int16 EVMOMAPL137_NANDFLASH_writePage( Uint32 src, Uint32 dst, Uint32 page_count );
#endifyang gao8 说:但是进行通信的数据地址和命令寄存器地址应该分别对应101行三个宏定义(因为格式问题,三个显示在了一行)
没显示出来,看不到,但是我估计是跟这个贴里的是一样的(对这个文件来源,我怀疑可能不是TI官方提供的吧):
http://www.deyisupport.com/question_answer/dsp_arm/c6000_dsp/f/32/p/109915/299203.aspx#299203
*(volatile UINT8* ) (0x62000000+0x00000000)=DATA;
*(volatile UINT8* ) (0x62000000+0x00000010)=CMD;
*(volatile UINT8* ) (0x62000000+0x00000008)=ADDR;
你的图中的第一列的地址不是从EMIFA地址线上送出去的,是从EMIFA的数据线上送出去的,理解一下NAND接口的时序,以及CLE,ALE的作用就明白了,NAND接口分为命令,地址,数据这几种不同的周期,但是其内容都是从数据线上送出去的,由CLE,ALE来区别这数据的不同功能。
不要纠结在DSP EMIFA接口这边,NAND就是一个异步接口,需要配置的无非是异步时序setup, strobe, hold。
看上面文件头显示是spectrum digital来的代码,但是从OMAPL137 EVM板网页下载的BSL里我也没找到你说的nandflash.h文件,而且没有NAND的例程,因为他的EVM板上没有NAND。
http://support.spectrumdigital.com/boards/evmomapl137/revg/
如果你是从一些非官方网站下载的代码,然后又到官方网站来提问,这会造成误解的。
我附上一份TI官方提供的flash_writer,希望对你有用。