TI 工程师你好:
AM3352板子的DDR3L 校验优化是,遇到问题具体如附件所示,Byte0的 DDR_CK Trace <DDR_DQSx trace,bute1的DDR_CK Trace >DDR_DQSx trace,
请问下 该取0还是取1?谢谢!
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TI 工程师你好:
AM3352板子的DDR3L 校验优化是,遇到问题具体如附件所示,Byte0的 DDR_CK Trace <DDR_DQSx trace,bute1的DDR_CK Trace >DDR_DQSx trace,
请问下 该取0还是取1?谢谢!